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Route track between two PTH pads
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dennevi
Hi
I have a six layer PCB with a connector using plated-through-hole mounting and would like to run traces between the holes in layer 2-5. In layer 1 and 6 the pads are to close to each other but in the inner layer it shouldn't be a problem. It seems however that I'm unable to do so without complaints from the DRC. Is it supposed to be like this? Do the pads need to be the same size in the inner layers? What's the best way to get around this? I guess I could route the traces with DRC turned off, but I'm not happy with this since the over all DRC will fail later. I also believe I could get around this by creating one round drilled pad in layer 1 and another similar pad i layer 6 with the exact same position and pin-number. I haven't tried yet though. Is there any better way to do this, or shouldn't I even try to do this? Kind regards Albin, Sweden |
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Brian Sidebotham
Hi Albin,
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I'm afraid KiCad is not yet aware of pad-stacks. The pad will be present on all your internal layers, and so the DRC is correctly warning you of the violation. It is best to plot one of the inner layers and view it with the gerber viewer, you'll see that the TH pad is present on this layer. Because a pad-stack cannot be defined in KiCad, a pad is either on one of the outer layers (SMT) or on all layers (TH). Good luck with your project. Best Regards, Brian. On 27 January 2011 13:15, dennevi <dennevi@...> wrote:
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I also believe I could get around this by creating one round drilledBrian has answered the rest of the question, but I think your suggested workaround might work. You do need to check the result with a gerber viewer, however. Regards, Robert. -- () Plain text email - safe, readable, inclusive. /\ |
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dennevi
Thank you both for the quick and helpful answers!
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I'll try my workaround and have a look in a gerber viewer tomorrow. Do you believe it will work if I have pads only in L1 and L6 and connect a trace to the plated hole in L3, even if there is no pad present in that layer? Or do I need to make all connections to the plated hole in L1 or L6? Kind regards Albin, Sweden --- In kicad-users@..., Robert <birmingham_spider@...> wrote:
I also believe I could get around this by creating one round drilledBrian has answered the rest of the question, but I think your suggested |
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On 27/01/2011 15:31, dennevi wrote:
If there's no pad to connect to you might be able to find some workaround that by chance gives you connectivity, but I doubt very much kicad will recognise it as being connected. I expect that kicad wont recognise the two pads on L1 and L6 as being connected unless they are connected externally (with a via). You are heading into potentially very deep water here. Is there really no other way of solving the problem of getting this track through that doesn't require bodges? Regards, Robert -- () Plain text email - safe, readable, inclusive. /\ |
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How about you make the module pads barely bigger than the hole and then add thick trace sections where you actually need to connect to them on any layer?
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Cat ---------------------------------------- To: kicad-users@... |
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Brian Sidebotham
On 27 January 2011 15:31, dennevi <dennevi@...> wrote:
Hi Albin, In KiCad it is impossible to connect to a TH plating that doesn't have a pad on the same layer as the trace as the pads are present on all copper layers; Actually, even though KiCad does not offer the best solution - which is to support pad stacks, connecting a track to a TH plating without a copper pad is something that CAD software should prevent anyway. You would never be able to have a reliable connection to a TH plating without a pad on the layer you want to connect. One of the main reasons is drilling accuracy, but there are other factors involved too. Here is some quick info that is worth a quick scan read at least: Normal operation for the CAD software supporting a full pad stack would be to have no pad present on the inner layers of the TH plating (Front and Back layers MUST have pads on to support the plating), then when a track is connected to the TH plating, a pad is added to the same layer as the track. I hope this makes sense for you. Best Regards, Brian. |
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dennevi
Thank to all for the great answers and innovative ideas!
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Cat: I somewhat like the idea! I guess the problem would be that I don't get any capture pads on top and bottom layers. And if I create them manually with traces, I won't get any opening in the soldermask. Brian: Thank you for the link and the clarifications! How great it would be if KiCad created pads only on top, bottom and when needed in inner layers! I tried creating the holes with almost no annular ring as Cat suggested, then I placed a round SMD pad on top and bottom layer with the same pin number. This seems to work fine. I can draw traces as normal in top and bottom layers, and if I need to connect the hole to an inner layer, I do it with a trace as wide as the pads on top and bottom layers. There is one little problem with this technique though. The DRC passes OK, but "unconnected pads" complain about the pads not being connected. Twice for every pin-number. The component which made me try all this is a pin-array (or bard stacker) with 1,27 mm pitch (50 mils). It has 2x25 pins so it's not a great idea to route all traces around the connector. I could use normal holes in one row (pads in all layers), and only have pads in top and bottom layer in the second row. In the first row, all connections would then be made in the inner layers, and in the second row all connections would be made in top or bottom layer. I can't find a combination for the second layer that works though. I've tried two standard pads on top of each other (one in top and one in bottom layer), like I first suggested, but I seem to get "ErrType(3)- Track near thru-hole" when I connect traces to ether layer. If I put a standard pad in top layer, and a SMT pad in bottom layer, I get the same error when I connect a trace to the SMT pad. The only combination I find that works with DRC is the one I described above, SMD pad in top layer, SMD pad in bottom layer, standard pad in all layers but with no annular ring. All three in the same position and the same number. It does however give the "unconnected pads" complaints for some reason. This seems to be the best option right now if I want to use PTH. If I changed the connector to SMT I wouldn't have the problem of course, but that's not preferred either. Thanks again for all the help you guys! Kind regards Albin Dennevi, Sweden --- In kicad-users@..., Brian Sidebotham <brian.sidebotham@...> wrote:
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There is one little problem with this technique though. The DRCThat's what I warned you about. Kicad doesn't assume that two pads with the same pad number are connected (even if they overlap) unless you connect them with a track or zone. I don't think you could do it with a track, but maybe if you placed a tiny zone over the two pads that share the same centre that would do the trick. Regards, Robert. -- () Plain text email - safe, readable, inclusive. /\ |
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dennevi
--- In kicad-users@..., Robert <birmingham_spider@...> wrote:
Placing a zone the same size as the pad on top and bottom layer solved the issues with kicad reporting pads to be unconnected! This is actually a fully functional workaround for me! All I have to do now is to draw 25 or 50 zones... I'll be even more suspicious when I look at the board in a gerber viewer next time before ordering though. Thanks guys! /Albin |
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