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Re: New file uploaded to softrock40

 

Art,

That is a good question. The linearity of any preamplifier is going to depend on biasing, how it is configured, the type of device used, etc. That is why you won't see any device specific spec on it.

Obviously the rule of thumb for a preamplifier's gain degrading the intermod performance will not be a problem here, because you want a unity gain device.

One big advantage of feedback in an amplifier is that it does a great job of linearizing the amplifier. I suggest using a device with enough feedback to turn it into a unity gain device.

One common way of doing this is to use a bipolar emitter follower. You would get a high input impedance and a very low output impedance, depending on the gain of the device by itself. Although there is a resistor in the emitter, the output RF impedance will be much lower than the resistor, so it shouldn't degrade anything in terms of noise figure due to the resistor's RMS noise power, KTB, Boltzman's Constant * Temperature in degrees Kelvin * the bandwidth in Hertz. (This is the same for any value of resistance, so this can be a problem in OP AMP circuits, for example, when high values of resistance are used. Then there will be a higher noise voltage across the resistor for the same noise power. If the OP AMP is a voltage gain circuit with a high resistance at the input as part of the feedback circuit, then this can be a problem in low noise amplifiers.)

Bipolars are lower noise at low impedances, and also have less 1/f noise, than do FETs. So I would suggest using a bipolar in this application.

Since you are working at such a low frequency and I assume a very short length of coax run in terms of a wavelength, to the antenna, I wouldn't worry about impedance matching the output.

Bill, WB5TCO

KY1K wrote:

Hi Bill and the group,

I'm trying to sort out a similar preamp issue.

I'd like to put my softrock on 185 KHz and 137 KHz. On those
frequencies, loops rule as far as receive antennas go. I personally
think there will be enough atmospheric noise on those frequencies so
that a preamp isn't necessary. Although, loops tend to be a nice
quiet receive antenna. But, my loop has around 1000 ohms impedance,
so I need a toroid transformer to match the radio front end to the
antenna. But, even if I get the impedance matched perfectly though,
my nice high Q loop antenna loses 50 percent of it's Q, a problem I'd
like to avoid if possible. Maintaining high antenna Q on those
frequencies is very desirable!

The obvious solution is a buffer amp with low/no gain. The buffer amp
should have a high input impedance input so as not to load the loop
and a 50 ohm output impedance.so it matches the input impedance of
the softrock. And it needs to be very linear with a goof noise figure.

But, all of the examples of preamps I find on the web do not have
linearity ratings and they all have pretty high gain. I need the
linearity but I do not need the gain. Can you suggest a buffer amp
that might be appropriate or should I go ahead and take the 50
percent hit on the loaded Q by matching for optimum power transfer?

I think I'm beginning to realize why flex-radio didn't include the LF
and VLF bands in their SDR-1000.

Any ideas?

Thanks,

Art



At 11:38 PM 10/28/2005, you wrote:

It looks like a good idea. It would solve a lot of direct conversion
and DDS problems we have been talking about.

But I would recommend avoiding putting a preamp in ahead of the SoftRock
30 Tayloe IF receiver. Even if the preamp was perfectly linear, which
it won't be, it will still degrade the 3rd order intermodulation
performance of the Tayloe detector by 2/3 of the preamp's gain in dB.
For most HF operation, at least on the lower bands, I doubt you will
need it anyway.

Bill, WB5TCO



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Re: Software Defined Superhet

 

--- In softrock40@..., "Bob Hillard" <rhillard@a...>
wrote:

Consider using the SR40 as an 'IF strip', preceeding it with a MMIC
preamp, some bandpass filtering, and a Diode Balanced Mixer
using an AMQRP DDS module as the LO source.

I have done that very thing with excellent results.
.............

That is very good news. A while back I posted a message (No. 484)
suggesting the same but did not get any feedback. I suppose 6m is not
a high priority to the readers of this group.

It would be very interesting if you could post some results regarding
your experiments.

Why didn't you use 9MHz as IF frequency? You could also have the 30m
band?

Jean-Claude Abauzit, PJ2BVU


Re: Rocky 1.1 released - new features

 

Hi Alex,

Great!

The support for multi-band will be a huge hit. Also, the wav
playback-record is a very welcome addition since (I think) you will be
able to play wave files recorded with PowerSDR and vise verse.

73 de Phil N8VB

--- In softrock40@..., "Alex, VE3NEA" <alshovk@d...> wrote:

I have just released Rocky 1.1. Two new functions hav been added.

1. Multi-band support. The drop-down button to the right of the
frequency
display allows you to select one of the pre-defined bands. For each
band,
the LO frequency and I/Q balance info are stored. Run the program
once, then
open Rocky.ini in a text editor and add/delete/edit the band
definitions if
necessary.

2. WAV file recording/playback. You can record either the input I/Q
signals
or the output audio signal. The I/Q recording can be played back in
Rocky.
The recordings of the output signal can be played in MS Multimedia
Player.
Please enter your name, callsign and QTH in the Settings dialog.
Rocky will
put these data in the comments section of your wav recordings so
that other
users will see at a glance when and where the recording was made,
who made
it, and what the LO frequency was. When playing an I/Q wave
recording, you
can view this info by moving your mouse cursor over the playback
progress
bar.

73 Alex VE3NEA


Rocky 1.1 released - new features

 

I have just released Rocky 1.1. Two new functions hav been added.

1. Multi-band support. The drop-down button to the right of the frequency display allows you to select one of the pre-defined bands. For each band, the LO frequency and I/Q balance info are stored. Run the program once, then open Rocky.ini in a text editor and add/delete/edit the band definitions if necessary.

2. WAV file recording/playback. You can record either the input I/Q signals or the output audio signal. The I/Q recording can be played back in Rocky. The recordings of the output signal can be played in MS Multimedia Player. Please enter your name, callsign and QTH in the Settings dialog. Rocky will put these data in the comments section of your wav recordings so that other users will see at a glance when and where the recording was made, who made it, and what the LO frequency was. When playing an I/Q wave recording, you can view this info by moving your mouse cursor over the playback progress bar.

73 Alex VE3NEA


Re: QSD Models

 

Hi Bill,

Not, not at all. It is not a Tayloe detector anymore. The active
opamp LPF provides the filtering that the capacitor/antenna impedance
of the Tayloe detector did before.

73 de Phil N8VB


--- In softrock40@..., Bill Dumke <billd@n...> wrote:

Wouldn't that defeat the filter properties of the Tayloe detector?

Bill WB5TCO

Phil Covington wrote:

P.S. I put a model of the capacitorless circuit to my blog at:



73 de Phil N8VB

--- In softrock40@..., "Phil Covington" <p.covington@g...>
wrote:

Hi Phil,

I think that you are correct that we could eliminate the signal
integrating capcitor. One of the circuits that I have been playing
with does exacly as you have described - no C and an active
opamp LPF
following it. It is a single switch being driven by a 50 ohm
source.
The output of the switch feeds directly into the non-inverting
input
of the op amp. If the op amp's feedback resistor is 200 ohms
then the
conversion loss of the single switch circuit is exactly equal to
what
you get with the single switch circuit using the "sampling
capacitor".
This is for a 25% duty cycle clock. If I increase the duty
cycle to
50% the loss now decreases. Obviously, the duty cycle of the
clock is
changing the output impedance of the switch as seen by the opamp. I
am going to play with it more and report the results.

Hope you had a nice trip.

73 de Phil N8VB


--- In softrock40@..., pvharman@a... wrote:

Phil,

I have built a model of the single switch mixer and get the same
result. The
conversion loss is lowest when the on time is 25%.

I'm curently working on a mathematical model of the mixer to
determine the
reason for this. Going to work on this on the plane home but
I have
a feeling
that we may be able to eliminate the C after the switch and
use the
amplifier
as a LPF to remove the sum component.

Phil... VU2/VK6APH


Quoting Phil Covington <p.covington@g...>:





--- In softrock40@..., KD5NWA <KD5NWA@c...> wrote:

Are you emulating real switches or perfect instantaneous
switches?



I have models for both ideal and real.



The reason is fairly simple, real switches do not turn on
and off

instantaneously, if you have switches turn on while
another turns

from on to off, the timing difference will cause the
switches to
have

a short circuit for a brief period. By having less than 25% on
the

waveform you are insuring that the switches are all off before
turning one on, and thereby avoid that brief short.


If it were only that simple...



For example in the modeled QSD circuit that I am using, even
if both

switches are on at the same time there is no "short circuit".



As a matter of fact, let's just forget about the other switch
and deal

with the case of ONE switch and ONE sample integrating
capacitor.

This removes any discussion on switch turn on/off times causing

overlap/short circuits. For even this circuit the simulation
seems to

indicate that a 20-25% on time for the sampling clock is best.



This would translate to 20-25nS on time, 75-80nS off time
ratio on a

100 nS period clock (10MHz).



Obviously this has something to do with the integration time
of the

sampling capacitor and I am sure there is a mathematical
equation

somewhere that predicts this. It is basically a sample and hold

circuit.



73 de Phil N8VB



P.S. LOL... I hope I know the difference between real and ideal

components after 26+ years in the field :-)

















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Re: Software Defined Superhet

 

Hi,

This is the path that I started down over a year ago. I was going to
basically duplicate the front end and 1st mixer of the K2 along with
most of the K2's PLL. The K2 uses a DAC tuned PLL reference to fill
in the 5 Khz steps of the PLL. Using the software NCO I could "fill
in" the PLL steps in software instead of using the DAC tuned reference
osc. The K2 uses an approx. 5 MHz IF so I was going to have a 20 Mhz
xtal osc into a divide by four counter to drive the QSD. This
arrangement would give coverage of 160 - 10m. Unfortuanetly, the more
you get into a design like this you begin to see that a lot of the
performance advantages of the QSD are now compromised.

73 de Phil N8VB

--- In softrock40@..., "Bob Hillard" <rhillard@a...> wrote:

Consider using the SR40 as an 'IF strip', preceeding it with a MMIC
preamp, some bandpass filtering, and a Diode Balanced Mixer
using an AMQRP DDS module as the LO source.

I have done that very thing with excellent results.

I've converted my SR40 to 30 meters, and use 10.138 mHz as the IF
center frequency. I've located the LO above the incoming signal in
order to reduce image frequencies.

The output of the DDS module ranges from 11.9 mHz on 160 meters to
31.6 mHz on 15 meters. By replacing the DDS module with the newer 60
mHz model when it becomes available, coverage will be increased to
include the 12, 10 and 6 meter bands.

With the LO above the incoming signal, the radio operates on the lower
sideband. However this can be corrected by software for bands that
require USB operation.

Band switching is accomplished by programming my DDS VFO controller
() so that each of the
eight programmable configurations represent a band. This gives me a
bandswitching VFO with wrap-around, up/down frequency control or
direct entry, variable VFO steps, sweep and scan functions, and 20
memory cells per band.

Presently I am switching bandpass filters manually, but that will
change with the addition of a band pass filter selection circuit
similar to that found in the 'Software Defined Radio for the Masses'
article. The bandpass filters are also similar to those found in the
QEX article. One of the filters, the one I use most oftenly, covers
the 15, 17, and 20 meter bands.

By using this scheme, the SR40 circuitry is not taxed by trying to
stretch it's operation past the limits of its design since it is
always operating on 30 meters. However the radio itself can operate
from 160M to 6M, with the exception of 30 meters (the IF frequency).
Likewise, since the DDS frequency does not have to be divided by four,
the useable range of the DDS module is extended to include all bands
through 15 meters.

What's next? Add a QSE module, a xmit DBM, some driver amps and WALLA,
an all band transceiver. Then add an HC908 controller to take care of
housekeeping, and a DSP module for operation independent of a
computer; a nice winter project.

I'll upload a block diagram of the radio.

Bob WA6UFQ


Re: Is the UBS-External Sound Card Works?

Bruce Beford
 

Hello, Hide.

I use a Soundblaster Audigy 2 NX USB external sound card on one of my
laptops and it works well. I have no direct expereince with the exact
card you ordered. I hope it will work ok for you. By the way, I
shipped your 30M crystal yesterday.

73, Bruce N1RX

--- In softrock40@..., "qrper723" <qrper72@y...> wrote:

Hi,
I made a mistake that my PC has no "LINE-IN" input terminal,only MIC
(Analog) input exists.
So I can not "Null the Images" from adjusting SDR-Software.I've
ordered
the Ext.USB Sound Box as "Sound Blaster Digital Music LX" from
Amazon.com.
Is there anyone to try the similar situation with me?
It will work I think but I have no confidence now...hi
Any suggestions?

ja9mat hidehiko


Re: Software Defined Superhet

 

Excellent idea, Bob !! That solves a lot of problems caused by "pushing" the existing parts to their limits. Cliff was talking about doing that at one of the breakfasts but I don't think he's built his SR-40 yet.

73 Kees K5BCQ


Is the UBS-External Sound Card Works?

qrper723
 

Hi,
I made a mistake that my PC has no "LINE-IN" input terminal,only MIC
(Analog) input exists.
So I can not "Null the Images" from adjusting SDR-Software.I've ordered
the Ext.USB Sound Box as "Sound Blaster Digital Music LX" from
Amazon.com.
Is there anyone to try the similar situation with me?
It will work I think but I have no confidence now...hi
Any suggestions?

ja9mat hidehiko


Re: New file uploaded to softrock40

 

Bill,

The preamp is needed to overcome the 6 dB loss of the double balanced
mixer.

Bob WA6UFQ

--- In softrock40@..., Bill Dumke <billd@n...> wrote:

It looks like a good idea. It would solve a lot of direct conversion
and DDS problems we have been talking about.

But I would recommend avoiding putting a preamp in ahead of the
SoftRock
30 Tayloe IF receiver. Even if the preamp was perfectly linear, which
it won't be, it will still degrade the 3rd order intermodulation
performance of the Tayloe detector by 2/3 of the preamp's gain in dB.
For most HF operation, at least on the lower bands, I doubt you will
need it anyway.

Bill, WB5TCO


softrock40@... wrote:


Hello,

This email message is a notification to let you know that
a file has been uploaded to the Files area of the softrock40
group.

File : /SDSTransceiver Block Diagram.bmp
Uploaded by : cat100bob <rhillard@a...>
Description : Software Defined Superhet Block Diagram

You can access this file at the URL:




To learn more about file sharing for your group, please visit:


Regards,

cat100bob <rhillard@a...>







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Re: New file uploaded to softrock40

KY1K
 

Hi Bill and the group,

I'm trying to sort out a similar preamp issue.

I'd like to put my softrock on 185 KHz and 137 KHz. On those frequencies, loops rule as far as receive antennas go. I personally think there will be enough atmospheric noise on those frequencies so that a preamp isn't necessary. Although, loops tend to be a nice quiet receive antenna. But, my loop has around 1000 ohms impedance, so I need a toroid transformer to match the radio front end to the antenna. But, even if I get the impedance matched perfectly though, my nice high Q loop antenna loses 50 percent of it's Q, a problem I'd like to avoid if possible. Maintaining high antenna Q on those frequencies is very desirable!

The obvious solution is a buffer amp with low/no gain. The buffer amp should have a high input impedance input so as not to load the loop and a 50 ohm output impedance.so it matches the input impedance of the softrock. And it needs to be very linear with a goof noise figure.

But, all of the examples of preamps I find on the web do not have linearity ratings and they all have pretty high gain. I need the linearity but I do not need the gain. Can you suggest a buffer amp that might be appropriate or should I go ahead and take the 50 percent hit on the loaded Q by matching for optimum power transfer?

I think I'm beginning to realize why flex-radio didn't include the LF and VLF bands in their SDR-1000.

Any ideas?

Thanks,

Art

At 11:38 PM 10/28/2005, you wrote:

It looks like a good idea. It would solve a lot of direct conversion
and DDS problems we have been talking about.

But I would recommend avoiding putting a preamp in ahead of the SoftRock
30 Tayloe IF receiver. Even if the preamp was perfectly linear, which
it won't be, it will still degrade the 3rd order intermodulation
performance of the Tayloe detector by 2/3 of the preamp's gain in dB.
For most HF operation, at least on the lower bands, I doubt you will
need it anyway.

Bill, WB5TCO


Re: New file uploaded to softrock40

 

It looks like a good idea. It would solve a lot of direct conversion and DDS problems we have been talking about.

But I would recommend avoiding putting a preamp in ahead of the SoftRock 30 Tayloe IF receiver. Even if the preamp was perfectly linear, which it won't be, it will still degrade the 3rd order intermodulation performance of the Tayloe detector by 2/3 of the preamp's gain in dB. For most HF operation, at least on the lower bands, I doubt you will need it anyway.

Bill, WB5TCO


softrock40@... wrote:


Hello,

This email message is a notification to let you know that
a file has been uploaded to the Files area of the softrock40
group.

File : /SDSTransceiver Block Diagram.bmp
Uploaded by : cat100bob <rhillard@...>
Description : Software Defined Superhet Block Diagram

You can access this file at the URL:


To learn more about file sharing for your group, please visit:


Regards,

cat100bob <rhillard@...>







------------------------------------------------------------------------
YAHOO! GROUPS LINKS

* Visit your group "softrock40
<>" on the web.
* To unsubscribe from this group, send an email to:
softrock40-unsubscribe@...
<mailto:softrock40-unsubscribe@...?subject=Unsubscribe>
* Your use of Yahoo! Groups is subject to the Yahoo! Terms of
Service <>.


------------------------------------------------------------------------


New file uploaded to softrock40

 

Hello,

This email message is a notification to let you know that
a file has been uploaded to the Files area of the softrock40
group.

File : /SDSTransceiver Block Diagram.bmp
Uploaded by : cat100bob <rhillard@...>
Description : Software Defined Superhet Block Diagram

You can access this file at the URL:


To learn more about file sharing for your group, please visit:


Regards,

cat100bob <rhillard@...>


Software Defined Superhet

 

Consider using the SR40 as an 'IF strip', preceeding it with a MMIC
preamp, some bandpass filtering, and a Diode Balanced Mixer
using an AMQRP DDS module as the LO source.

I have done that very thing with excellent results.

I've converted my SR40 to 30 meters, and use 10.138 mHz as the IF
center frequency. I've located the LO above the incoming signal in
order to reduce image frequencies.

The output of the DDS module ranges from 11.9 mHz on 160 meters to
31.6 mHz on 15 meters. By replacing the DDS module with the newer 60
mHz model when it becomes available, coverage will be increased to
include the 12, 10 and 6 meter bands.

With the LO above the incoming signal, the radio operates on the lower
sideband. However this can be corrected by software for bands that
require USB operation.

Band switching is accomplished by programming my DDS VFO controller
() so that each of the
eight programmable configurations represent a band. This gives me a
bandswitching VFO with wrap-around, up/down frequency control or
direct entry, variable VFO steps, sweep and scan functions, and 20
memory cells per band.

Presently I am switching bandpass filters manually, but that will
change with the addition of a band pass filter selection circuit
similar to that found in the 'Software Defined Radio for the Masses'
article. The bandpass filters are also similar to those found in the
QEX article. One of the filters, the one I use most oftenly, covers
the 15, 17, and 20 meter bands.

By using this scheme, the SR40 circuitry is not taxed by trying to
stretch it's operation past the limits of its design since it is
always operating on 30 meters. However the radio itself can operate
from 160M to 6M, with the exception of 30 meters (the IF frequency).
Likewise, since the DDS frequency does not have to be divided by four,
the useable range of the DDS module is extended to include all bands
through 15 meters.

What's next? Add a QSE module, a xmit DBM, some driver amps and WALLA,
an all band transceiver. Then add an HC908 controller to take care of
housekeeping, and a DSP module for operation independent of a
computer; a nice winter project.

I'll upload a block diagram of the radio.

Bob WA6UFQ


Re: Divide by 4 or 2

 

Milt,

If it needs a symmetrical clock, I would recommend the sine wave to square wave converter used in the QRP2001 RF section. It just takes one gate, in this case it is an exclusive OR gate, but it can be two NAND gates, or anything similar as well. Just feed back some of the output to the input through a resistive T network with a shunt capacitor to ground in the middle to filter the RF. This bias feedback arrangement will square up any sine wave. It is commonly used by high speed logic designers to square up their clocks to obtain maximum frequency capability of their logic circuits.

As an RF engineer I used one of these circuits as a high frequency phase stable frequency multiplier about 26 years ago. It used, I think, two ECL 1663 NOR gates which at that time were pretty fast. The sine wave input was at 50 MHz. All I had to do to "tune" it was to look at the output on a spectrum analuyzer and set one of the resistor values for minimum output on the even harmonics. I could get about 30 dB even harmonic rejection over quite a wide frequency range compared to the odd harmonics which are what make up a 50% duty cycle square wave. (Then it was also easier to filter the output signal I wanted at 350 MHz., which is an odd harmonic, since the even harmonics on either side were greatly attenuated. And it had spectacular phase stability, because all devices were differential inputs on the same die, so they were temperature matched as well.)

Anyhow, it was an easy way to get a symmetric clock. I think it would work for the JK Flip Flop method as well.

Bill

Milt Cram wrote:

KD5NWA wrote:

That is the problem with /2 quadrature generation, you need a
symmetrical input clock so you can use both edges to the clock. That
is, if you are going to 25% clock phases for maximum gain. You can
use a clock at less that the frequency of interest (sub-sampling) but
your gain goes down.

If you have a symmetrical 2X clock you might as well use a doubler
(analog or digital) and divide by 4 to get a 25% clock phase.


At 10:22 AM 10/28/2005, you wrote:
Here is the file again. I did not post it to the files section.
I was
referring to the 74HC and 74AHC, high speed and advanced high
speed CMOS.

I'm probably working through the truth tables incorrectly, but I don't
think this is a quadrature divide-by-2. It appears to be a quadrature
divide-by-four.

Call the upper FF #1 and the lower FF #2, use the indicated 74xx73
which
has a negative-edge-triggered clock, and have both reset as the initial
condition, then:

JK1 JK2 Q1 Q2
10 01 0 0 -- initial condition
10 10 1 0 -- after first clock (falling edge)
01 10 1 1 -- after second clock (falling edge)
01 01 0 1 -- after third clock (falling edge)
10 01 0 0 -- after fourth clock (falling edge)

We are now back to the initial condition and the cycle repeats ad
infinitum.

To get a quadrature divide by two, you need to toggle one flip-flop on
the positive edge of the clock, and the other on the negative edge of
the clock, as there are only a total of 4 edges in a 2x clock. This
also implies the clock must be perfectly symmetrical, e.g. a 50% duty
cycle.

If this is the case, you can use a D (with input tied to its own /Q), a
J-K (with J and K both pulled high) or a T flip-flop, and run the clock
through an exclusive-OR to each of the two flip-flop clock inputs. One
Ex-Or will have its second input pulled high, the other pulled low, so
you have a clock and its inverse with essentially equal delay. Thus,
the flip-flop chosen can be either positive or negative edge triggered
and you'll get the correct result.

The example circuit but with the inverted clock fed to FF #1
results in:

JK1 JK2 Q1 Q2
10 01 0 0 -- initial condition
10 10 1 0 -- after first clock (rising edge)
01 10 1 1 -- after second clock (falling edge)
01 01 0 1 -- after third clock (rising edge)
10 01 0 0 -- after fourth clock (falling edge)

And we have a quadrature divide-by-two.

Enjoy!

Lyle KK7P





Yahoo! Groups Links



Cecil Bayona
KD5NWA
www.qrpradio.com
Cecil,

Why not use 50% clock phases staggered by 90 degrees? If you also have
non-inverted and inverted RF, as in Softrock40, you can then get the
equivalent of "full wave rectification" with two SPDT switches. This
will give more output than 25% phases which result in "half wave
rectification".

Milt,
W8NUE


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Re: QSD Models

 

Wouldn't that defeat the filter properties of the Tayloe detector?

Bill WB5TCO

Phil Covington wrote:

P.S. I put a model of the capacitorless circuit to my blog at:



73 de Phil N8VB

--- In softrock40@..., "Phil Covington" <p.covington@g...>
wrote:

Hi Phil,

I think that you are correct that we could eliminate the signal
integrating capcitor. One of the circuits that I have been playing
with does exacly as you have described - no C and an active opamp LPF
following it. It is a single switch being driven by a 50 ohm source.
The output of the switch feeds directly into the non-inverting input
of the op amp. If the op amp's feedback resistor is 200 ohms then the
conversion loss of the single switch circuit is exactly equal to what
you get with the single switch circuit using the "sampling capacitor".
This is for a 25% duty cycle clock. If I increase the duty cycle to
50% the loss now decreases. Obviously, the duty cycle of the clock is
changing the output impedance of the switch as seen by the opamp. I
am going to play with it more and report the results.

Hope you had a nice trip.

73 de Phil N8VB


--- In softrock40@..., pvharman@a... wrote:

Phil,

I have built a model of the single switch mixer and get the same
result. The
conversion loss is lowest when the on time is 25%.

I'm curently working on a mathematical model of the mixer to
determine the
reason for this. Going to work on this on the plane home but I have
a feeling
that we may be able to eliminate the C after the switch and use the
amplifier
as a LPF to remove the sum component.

Phil... VU2/VK6APH


Quoting Phil Covington <p.covington@g...>:





--- In softrock40@..., KD5NWA <KD5NWA@c...> wrote:

Are you emulating real switches or perfect instantaneous switches?


I have models for both ideal and real.


The reason is fairly simple, real switches do not turn on and off
instantaneously, if you have switches turn on while another turns
from on to off, the timing difference will cause the switches to
have

a short circuit for a brief period. By having less than 25% on
the

waveform you are insuring that the switches are all off before
turning one on, and thereby avoid that brief short.


If it were only that simple...



For example in the modeled QSD circuit that I am using, even if both

switches are on at the same time there is no "short circuit".



As a matter of fact, let's just forget about the other switch
and deal

with the case of ONE switch and ONE sample integrating capacitor.

This removes any discussion on switch turn on/off times causing

overlap/short circuits. For even this circuit the simulation
seems to

indicate that a 20-25% on time for the sampling clock is best.



This would translate to 20-25nS on time, 75-80nS off time ratio on a

100 nS period clock (10MHz).



Obviously this has something to do with the integration time of the

sampling capacitor and I am sure there is a mathematical equation

somewhere that predicts this. It is basically a sample and hold

circuit.


73 de Phil N8VB



P.S. LOL... I hope I know the difference between real and ideal

components after 26+ years in the field :-)














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Re: QSD Models

 

P.S. I put a model of the capacitorless circuit to my blog at:



73 de Phil N8VB

--- In softrock40@..., "Phil Covington" <p.covington@g...>
wrote:

Hi Phil,

I think that you are correct that we could eliminate the signal
integrating capcitor. One of the circuits that I have been playing
with does exacly as you have described - no C and an active opamp LPF
following it. It is a single switch being driven by a 50 ohm source.
The output of the switch feeds directly into the non-inverting input
of the op amp. If the op amp's feedback resistor is 200 ohms then the
conversion loss of the single switch circuit is exactly equal to what
you get with the single switch circuit using the "sampling capacitor".
This is for a 25% duty cycle clock. If I increase the duty cycle to
50% the loss now decreases. Obviously, the duty cycle of the clock is
changing the output impedance of the switch as seen by the opamp. I
am going to play with it more and report the results.

Hope you had a nice trip.

73 de Phil N8VB


--- In softrock40@..., pvharman@a... wrote:

Phil,

I have built a model of the single switch mixer and get the same
result. The
conversion loss is lowest when the on time is 25%.

I'm curently working on a mathematical model of the mixer to
determine the
reason for this. Going to work on this on the plane home but I have
a feeling
that we may be able to eliminate the C after the switch and use the
amplifier
as a LPF to remove the sum component.

Phil... VU2/VK6APH


Quoting Phil Covington <p.covington@g...>:





--- In softrock40@..., KD5NWA <KD5NWA@c...> wrote:

Are you emulating real switches or perfect instantaneous switches?


I have models for both ideal and real.



The reason is fairly simple, real switches do not turn on and off
instantaneously, if you have switches turn on while another turns
from on to off, the timing difference will cause the switches to
have

a short circuit for a brief period. By having less than 25% on
the

waveform you are insuring that the switches are all off before
turning one on, and thereby avoid that brief short.


If it were only that simple...



For example in the modeled QSD circuit that I am using, even if both

switches are on at the same time there is no "short circuit".



As a matter of fact, let's just forget about the other switch
and deal

with the case of ONE switch and ONE sample integrating capacitor.

This removes any discussion on switch turn on/off times causing

overlap/short circuits. For even this circuit the simulation
seems to

indicate that a 20-25% on time for the sampling clock is best.



This would translate to 20-25nS on time, 75-80nS off time ratio on a

100 nS period clock (10MHz).



Obviously this has something to do with the integration time of the

sampling capacitor and I am sure there is a mathematical equation

somewhere that predicts this. It is basically a sample and hold

circuit.



73 de Phil N8VB



P.S. LOL... I hope I know the difference between real and ideal

components after 26+ years in the field :-)

















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Ham radio














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softrock40-unsubscribe@...

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QSD Models

 

Hi All,

For those of you interested in the performance of the QSD circuit in Softrock40:

A few hours of modelling of the SR40 circuit leads me to these conclusions.

1) The circuit behaves like a sample and hold detector since the time constant of the 0.1uF holding capacitor in parallel with the 10 ohm input resistor to the opamp is several times the period of the incoming RF signal. Thus, the circuit does not discharge much during each cycle.

2) Unlike many sample and hold circuits, which are driven from a very low impedance, this circuit has a relatively high impedance consisting of the transformed impedance of the source (50 ohms) plus 10 ohms plus the switch on-resistance. This prevents the holding capacitor from being charged to the peak value of the input signal. (I did not include the transformer in my model)

3) Where many sample and hold circuits use a very short pulse duration for the sampling, the SR40 uses a 25% duty cycle pulse. This tends to compensate for some of the lost charging due to the impedance of the circuit. Further, as the sampling duration is reduced below a certain point, the effective resistance of the source increases, decreasing the charging of the holding capacitor.

4) In my model, posted earlier, reducing the 10 ohm resistor on the transformer side of the switch, can significantly increase the output of the detector--as much as 10 dB, if the switch resistance is only 1 to 2 ohms. The effect will be reduced if the switch resistance is higher.

5) My comments yesterday suggesting that 50% sampling interval would be better, applies only to the case of an integrating detector. In such a case 50% sampling of a sine wave gives about 1.6dB more output than a 25% sampling interval. Reducing the sampling interval further reduces the output.

6) The "Ideal" sample and hold circuit should charge to the peak voltage of the input for very short sample intervals (i.e. much less than 25% of a cycle). Reducing the circuit resistance can increase the signal, but may introduce an unacceptable unbalance between the I and Q channels due to variations in the on-resistance of the switches.

7) The integrating detector should have some advantage over the sample and hold with regard to noise. However, if there is appreciable band limiting ahead of the detector, the advantage will likely be minimal.

73,
Milt W8NUE


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Re: QSD Models

 

Hi Phil,

I think that you are correct that we could eliminate the signal
integrating capcitor. One of the circuits that I have been playing
with does exacly as you have described - no C and an active opamp LPF
following it. It is a single switch being driven by a 50 ohm source.
The output of the switch feeds directly into the non-inverting input
of the op amp. If the op amp's feedback resistor is 200 ohms then the
conversion loss of the single switch circuit is exactly equal to what
you get with the single switch circuit using the "sampling capacitor".
This is for a 25% duty cycle clock. If I increase the duty cycle to
50% the loss now decreases. Obviously, the duty cycle of the clock is
changing the output impedance of the switch as seen by the opamp. I
am going to play with it more and report the results.

Hope you had a nice trip.

73 de Phil N8VB


--- In softrock40@..., pvharman@a... wrote:

Phil,

I have built a model of the single switch mixer and get the same
result. The
conversion loss is lowest when the on time is 25%.

I'm curently working on a mathematical model of the mixer to
determine the
reason for this. Going to work on this on the plane home but I have
a feeling
that we may be able to eliminate the C after the switch and use the
amplifier
as a LPF to remove the sum component.

Phil... VU2/VK6APH


Quoting Phil Covington <p.covington@g...>:





--- In softrock40@..., KD5NWA <KD5NWA@c...> wrote:

Are you emulating real switches or perfect instantaneous switches?


I have models for both ideal and real.



The reason is fairly simple, real switches do not turn on and off
instantaneously, if you have switches turn on while another turns
from on to off, the timing difference will cause the switches to
have

a short circuit for a brief period. By having less than 25% on the
waveform you are insuring that the switches are all off before
turning one on, and thereby avoid that brief short.


If it were only that simple...



For example in the modeled QSD circuit that I am using, even if both

switches are on at the same time there is no "short circuit".



As a matter of fact, let's just forget about the other switch and deal

with the case of ONE switch and ONE sample integrating capacitor.

This removes any discussion on switch turn on/off times causing

overlap/short circuits. For even this circuit the simulation seems to

indicate that a 20-25% on time for the sampling clock is best.



This would translate to 20-25nS on time, 75-80nS off time ratio on a

100 nS period clock (10MHz).



Obviously this has something to do with the integration time of the

sampling capacitor and I am sure there is a mathematical equation

somewhere that predicts this. It is basically a sample and hold

circuit.



73 de Phil N8VB



P.S. LOL... I hope I know the difference between real and ideal

components after 26+ years in the field :-)

















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Shortwave receivers


Ham radio














YAHOO! GROUPS LINKS




Visit your group "softrock40" on the web.

To unsubscribe from this group, send an email to:
softrock40-unsubscribe@...

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Re: 50% QSD with four caps

KD5NWA
 

Interesting, if my capacitor is too big, I get a big hump in the center of the band-pass, where have we seen that before? When I say lower it, I mean really lower it, in this test to .001uF, signals went up, hump in the middle went down,

Interesting thing to try out, lower the integrating cap, increase the filtering in the op-amp to keep trash past 24KHz out of the sound card.

In a quickie emulation with software you are not familiar with you might get results that don't pan out in real life, but it's a strange coincidence, might be worth checking out..

At 02:59 PM 10/28/2005, you wrote:
I did a rough approximation, and using a SPDT switch into a
capacitor increase the signal by 50% versus a single switch, using
two caps and two independent switches increases it by 100% when you add them.

Cut the duty cycle to 25% amplitude of the output goes up by roughly 50%.

So far 4 caps IQ 25% QSD is the winner in this simple test.

Impedance of the source 1000 Ohms, resistor used to limit cap current
1000 Ohms, transformer with 1:1 ratio.

Using someone else's brand of Spice sure slows you down. Below is a
link to a free visual Spice, you create a schematic using a visual
editor provided, set the values of the parts, set the frequency of
the signal sources, set the simulation length and let her rip. It has
some nice multi-winding transformer parts, I liked that.

< >

I own the professional version of this one from BeigeBag, it is much
faster and of course no limits, interfaces to Eagle for board
layouts, but they have a free version available, download the "free"
not the trial version.

< >



Cecil Bayona
KD5NWA
www.qrpradio.com

I fail to see why doing the same thing over and over and getting the
same results every time is insanity: I've almost proved it isn't;
only a few more tests now and I'm sure results will differ this time ...






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Cecil Bayona
KD5NWA
www.qrpradio.com

I fail to see why doing the same thing over and over and getting the same results every time is insanity: I've almost proved it isn't; only a few more tests now and I'm sure results will differ this time ...