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Re: [Flexradio] Turning off the AGC
Robert McGwier
I don't want any of my energy going outside the filter or coming in from outside. I would swap 1,2 and always do. It probably makes a tenth dB difference altogether but I don't want even that error.
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Bob N4HY Gerald Youngblood wrote: Measuring MDS is a simple procedure on the SDR-1000 with PowerSDR software. --
Laziness is the number one inspiration for ingenuity. Guilty as charged! |
Re: [Flexradio] Turning off the AGC
KD5NWA
Thanks for the offer, it would be nice to compare.
I'm not going around buying sound cards for the fun of it, I own several sound cards (most free) and I would like to know how well they do in my setup. I bought the Delta-44 because that one is the card that is supposed to have really good qualities and can be used for both receive and transmit, which I intend to experiment with. I have the following cards; 5 SB1024I Pci 24 bits 4 SB Live Pci 16 bits 2 SB MP+ USB 16 bits 1 SB Live 24 Pci 24 bits 1 SB Live 24 USB 24 bits 1 SB Audigy 2 ZS Pci 24 bits 1 Delta-44 Pci 24 bits, on it's way 1 CHAINTECH AV-710 Pci 16/24 bits, just got it today. 1 iMic USB 16 bits? it's on my Mac but it can move 1 Philipps 7:1 Pci 24 bits, took me forever to find the right drivers. 1 Weirdo Brand Pci 32 bits 192KHz claims 129 dB range, eats CPU cycles like there is no tomorrow, if I can find the darn thing, it's in a box somewhere. Various built in sound cards, most are AC97 based 20 bits I'm sure if I look around in the garage I can find some additional models packed in boxes, but this gives you an idea. The Delta-44 is going in the main Dell PC(2) on my workbench next to my radios, but I would like to play with SDR on the PC's I have in the den(4), and in the living room(2). I have a lot of PC's, that is not counting two MAC', nor my son's PC's(3). No! I don't have them all turned on at the same time, usually no more than three at a time. Crazy huh? At 04:25 PM 10/27/2005, you wrote: If you are interested, Gerald may be willing to share info we have hereCecil Bayona KD5NWA www.qrpradio.com I fail to see why doing the same thing over and over and getting the same results every time is insanity: I've almost proved it isn't; only a few more tests now and I'm sure results will differ this time ... |
Rocky working fine now!
Mike Blake
¿ªÔÆÌåÓýAlex,? After exchanging the emails with you
regarding the BSoD that I was getting every time I closed Rocky I called
Creative Labs and had them UPS me a USB MP3+ so that I could load it on my
laptop.? I was afraid that it was not going to arrive before we started
back for home (we are on vacation on the Isle of Palms, SC) but it arrived
today.
?
After installing the MP3+, and the Creative Labs
drivers, the BSoD problem dissappeared.? I had previously installed, and
removed the USB SoundBlaster Live 24 hardware and drivers but the uninstall may
not have removed all of its' drivers.
?
I just wanted to let you know that all is well and
to let everyone else know that the MP3+ works fine with Rocky on my eMachines
2350 laptop.
?
73 and thanks for the nice software.? This
whole SDR thing has put new excitement into ham radio for me after about 48
years of being a ham.
?
73 - Mike - K9JRI? (portable 4 on The Isle of
Palms, SC) |
Re: Turning off the AGC
Robert McGwier
Yes and NO.
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It turns off all variable gain but it turns on a FIXED gain. Go the AGC/ALC setup tab and set this fixed gain to ZERO 0dB and now you are all set. Bob N4HY KD5NWA wrote: I want to try to measure the noise floor of my SR-40 setup and will need to have the AGC completely turned off. --
Laziness is the number one inspiration for ingenuity. Guilty as charged! |
Re: SR-40 DDS
Robert McGwier
No. Each of the capacitors is charged around the 0-2pi circle at different turn on and different turn off phases. 0,90,180,270 degrees but each capacitor is turned on and off only ONCE per carrier frequency cycle. If you use a Johnson counter to drive this sampling clock then it needs to be 4X to turn each cap on and off at the correct phases.
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Bob N4HY John H. Fisher wrote: Here's my understanding of the I and Q representation. You have to sample at 90 degrees apart in order to resolve the properties (modulation) of the Carrier frequency. Therefore you always have to sample at four times the desired carrier. Think of it as an X and Y coordinate system. If the X and Y axis are not 90 degrees apart, you have a difficult time resolving the resultant vector. Now you can do the w --
Laziness is the number one inspiration for ingenuity. Guilty as charged! |
Re: [Flexradio] Turning off the AGC
KD5NWA
I'm not trying to measure the noise floor, I'm trying to measure the lowest discernible signal "MSD"
A voltage reading on a meter by itself means nothing since it's not being compared to a known quantity. The procedure is; Run the radio at maximum gain with a 500 Hz filter Measure the Audio output with a RMS meter, and a 1 micro-volt signal in the pass-band, set for maximum audio output. Remove the 1 microvolt signal and measure the Audio output with the meter Do some simple math with the two figures and you come up with MSD rating of the radio. But for this to be accurate the radio must be running at maximum gain, not minimum gain. Once you have that figure you can figure out the noise floor in dB. What I would need to know what is the maximum gain that the software would use while listening to weak signals. At 02:35 PM 10/27/2005, Eric Wachsmann - FlexRadio wrote: Cecil,Cecil Bayona KD5NWA www.qrpradio.com I fail to see why doing the same thing over and over and getting the same results every time is insanity: I've almost proved it isn't; only a few more tests now and I'm sure results will differ this time ... |
Re: QSD
Hi Milt,
Sounds interesting... Do you have a circuit diagram of this arrangement anywhere? Thanks. 73 de Phil N8VB --- In softrock40@..., Milt Cram <w8nue@a...> wrote: outputs. resistance/impedance in the circuit. In this case, it is the sum of the two 10 ohmchannels. Is the intention of this to give a good impedance match to the 50 ohmsource? 10/27/2005 |
QSD
Here's a question and a comment for Phil, Alex, Tony, et al--
In the SoftRock40 the transformer provides both non-inverted and inverted RF to the switches. The outputs of the FFs are gated so that the switches are operated only over one quarter cycle each (90 degrees). /Why not operate the four switches as two SPDT switches and eliminate the gating of the two FF outputs?/ This would provide two "full wave rectified" outputs, instead of two "half wave rectified" outputs, and therefore a 6dB gain improvement. I use such an arrangement in my "PC-Less" PSK31 interface to generate my I and Q outputs. I'm also puzzled at the use of the inverting inputs of the audio amplifiers. Since these are very low impedance points in the circuit, the drive to the amplifiers is essentially a current. However, the level of the current is very dependent on the total resistance/impedance in the circuit. In this case, it is the sum of the two 10 ohm resistors, plus the on-resistance of the switch, plus the transformed source impedance. I haven't looked at the specs for the switch, but if there is much variation in on-resistance between the individual switches, it could contribute to gain inbalance between the channels. Is the intention of this to give a good impedance match to the 50 ohm source? Regards, Milt, W8NUE -- No virus found in this outgoing message. Checked by AVG Free Edition. Version: 7.1.362 / Virus Database: 267.12.5/150 - Release Date: 10/27/2005 |
Linear Technology LTSpice Switcher CAD
SWCad will allow you to output a wave file from the simulation.
.wave c:\mysound.wav 16 48k V(left) V(right) is the directive. The cool part is that you can play the wave files in PowerSDR. As a test I generated two sine 10khz sine waves, one at 0 deg and the other at 90 deg. Then I created a phase error by increasing the 90 deg signal to 110 deg. Using the manual I/Q correction I found that PowerSDR was able to correct for this 20 deg phase imbalance. It should be posssible to do all kinds of simulations and then actually test them in PowerSDR. 73 de Phil N8VB |
Re: [dds-vfo] Bezel for Hantronix LCD Display
KY1K
Now that softrock-40 mania has passed and softrock Mark 5 mania is
approaching, will be soon had SDR-908 mania??
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George, how can you even begin to estimate how many of these to make available in the first run??? I can't even imagine the demand, it's a little frightening to even think about. GL. Art At 09:04 PM 10/26/2005, you wrote: ??? Took a look at the SDR-908 page, George. Looks and sounds fantastic. I can't wait! |
Re: [Flexradio] Turning off the AGC
KD5NWA
In a real radio yes, but I want to make sure that it is running flat out full gain on the sound card.
At 01:04 PM 10/27/2005, Tayloe Dan-P26412 wrote: It seems to me that if you use MDS measurements (3 db S+N/N audio shift) to measure the noise floor, the AGC will take care of itself.Cecil Bayona KD5NWA www.qrpradio.com I fail to see why doing the same thing over and over and getting the same results every time is insanity: I've almost proved it isn't; only a few more tests now and I'm sure results will differ this time ... |
Turning off the AGC
KD5NWA
I want to try to measure the noise floor of my SR-40 setup and will need to have the AGC completely turned off.
If I turn off the AGC of the Flex software will it really completely turn off all forms of variable gain? Cecil Bayona KD5NWA www.qrpradio.com I fail to see why doing the same thing over and over and getting the same results every time is insanity: I've almost proved it isn't; only a few more tests now and I'm sure results will differ this time ... |
Re: QSD Models
--- In softrock40@..., KD5NWA <KD5NWA@c...> wrote:
I have models for both ideal and real. The reason is fairly simple, real switches do not turn on and offIf it were only that simple... For example in the modeled QSD circuit that I am using, even if both switches are on at the same time there is no "short circuit". As a matter of fact, let's just forget about the other switch and deal with the case of ONE switch and ONE sample integrating capacitor. This removes any discussion on switch turn on/off times causing overlap/short circuits. For even this circuit the simulation seems to indicate that a 20-25% on time for the sampling clock is best. This would translate to 20-25nS on time, 75-80nS off time ratio on a 100 nS period clock (10MHz). Obviously this has something to do with the integration time of the sampling capacitor and I am sure there is a mathematical equation somewhere that predicts this. It is basically a sample and hold circuit. 73 de Phil N8VB P.S. LOL... I hope I know the difference between real and ideal components after 26+ years in the field :-) |
Re: SR-40 DDS
Cecil Lindsey
Hi Kees,
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It 'tis a good idea. Take a look at Cecil - WA6RDY ----- Original Message -----
From: <windy10605@...> To: <softrock40@...> Sent: Wednesday, October 26, 2005 8:44 PM Subject: [softrock40] SR-40 DDS I was just sitting here thinking (1000mi away from my hobbybench). Since the Tayloe detector is really a divide by two, the purpose of the first 74HC74 is just to give you a good 50% duty cycle for the clocking to give you the proper 90 degree phase shifts (but it also cuts the frequency in half). Those of us wanting to try out the AD9850 DDS means an output of 60Mhz to achieve a good receiver for 20m. 60Mhz is a stretch for the AD9850 (max input osc frequency, max voltage of 5V, consumes max power, runs hot, etc). For the 3.3V AD9850 40Mhz analog out is about it. What if you took a 30MHz analog signal, ran it through the termination resistance for voltage --and then-- through a full wave bridge into a 5 pole or 7 pole LPF and into the comparator as shown in one of AD'd app notes. The idea is that the full wave bridge using matched, high speed, signal diodes would effectively double the frequency. You adjust the comparator reference voltage to give you two good clock signals |
Re: QSD Models
KD5NWA wrote:
[snip]That's one of the reasons why I chose the ADG704 for my QSD. From the datasheet : PRODUCT HIGHLIGHTS ................. 7. Break-Before-Make Switching Action. ................. 73 Alberto I2PHD |
Re: QSD Models
Milt Cram wrote:
[snip]Quite true. If it can be of help, I saved this page from a site of Advanced Microwave Inc. where the relevant math is laid down. 73 Alberto I2PHD |
Re: QSD Models
KD5NWA
Are you emulating real switches or perfect instantaneous switches?
If you are emulating real switches the your conclusions are correct in that a slightly less that 25% waveform is the most efficient. I'm in the process of creating my own QSD and it will use 20% waveform. The reason is fairly simple, real switches do not turn on and off instantaneously, if you have switches turn on while another turns from on to off, the timing difference will cause the switches to have a short circuit for a brief period. By having less than 25% on the waveform you are insuring that the switches are all off before turning one on, and thereby avoid that brief short. At 08:45 AM 10/27/2005, Phil Covington wrote: Hi Tony,Cecil Bayona KD5NWA www.qrpradio.com I fail to see why doing the same thing over and over and getting the same results every time is insanity: I've almost proved it isn't; only a few more tests now and I'm sure results will differ this time ... |
Re: QSD Models
Tony Parks wrote:
Hi Phil,Tony, If I might add my two cents-- Your second question is the more important one. The loss of gain due to clock skew is not very significant for desired signal detection. However, undesired signal response, such as poor image rejection, is a significant problem. For example, if you note the adjustments required for several of the software applications that have been made available for SoftRock40, good image rejection requires adjustments to a degree or better. I don't have the exact numbers at the tip of my tongue, but I you are interested, I can do a quick MathCad model. A rough estimate is that a 1 degree phase error (1/60th of a radian) will give an image rejection of no better than -36dB, and this assumes that the I and Q channel gains are matched perfectly. A 0.1 degree phase error will result in an image rejection of the order of -55dB. Likewise, a 1 db gain error between the two channels, with perfect phase, results in an image rejection of no better than -38dB. Consequently, gains should be matched to withing a fraction of a dB, and phase error should be within a few tenths of a degree. These can be significant problems at high frequencies. I have been designing an interface for PSK that does not involve a PC. Instead, it uses a pair of DDSs that provide two LOs that are 90 degrees apart. I am using two SPDT switches for my QSD. The interface uses three '908 uC for control, display driver, and the amplitude modulator that is needed for PSK31. I have done quite a bit of modelling of this interface, but have not really examined the effect of phase errors on image rejection as I have filtered the input ahead of the QSD. My problems are relatively minor, because I am working with only audio input frequencies (the audio out of my HF rig). 73, Milt W8NUE -- No virus found in this outgoing message. Checked by AVG Free Edition. Version: 7.1.361 / Virus Database: 267.12.5/149 - Release Date: 10/25/2005 |
Re: QSD Models
Hi Tony,
Let me take a look at this and report back. I reran the simulation with a 4 switch QSD using two signal integrating capacitors. I am taking the 4 switch QSD with 4 integrating capacitors and 50% clock duty cycle as the reference (0dB). Here is what I have so far: 4SW4 QSD is the 4 switch qsd circuit with 4 signal integrating capacitors. I(Q) and /I(/Q) are summed with an op amp. This is like the SDR-1000 QSD. 2SW2 QSD is the 2 switch qsd circuit with 2 signal integrating caps. This would be like SR V5 4SW2 QSD is the 4 switch qsd circuit with 2 signal integrating caps. The caps are selected twice each cycle like SR V4. 50% duty cycle clock: 4SW4 QSD -> 0 dB (reference) 2SW2 QSD -> -5.86 dB 4SW2 QSD -> -5.62 dB 25% duty cycle clock: 4SW4 QSD -> +2.45 dB 2SW2 QSD -> -3.26 dB 4SW2 QSD -> -2.63 dB 15% duty cycle clock: 4SW4 QSD -> +2.14 dB 2SW2 QSD -> -3.45 dB 4SW2 QSD -> -2.22 dB The 4SW2 QSD seems to have the least loss at around 12 - 15% duty cycle clock. 73 de Phil N8VB --- In softrock40@..., "Tony Parks" <raparks@c...> wrote: clock skew is not the right question to ask. What we really areinterested in is the gain from RF input to demodulated signal output. In the case ofCW I would think this would just be the vector sum of the I and Q signals. |
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