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Re: removing crosstalk spike from a signal question

 

On Sat, Oct 26, 2024 at 12:52 PM, Terry wrote:
I think you're looking at an anomaly from the simulator John. (maybe one "slice" analysis getting ahead of another?)? I reconstructed just the FET switches (no voltage monitor) and get spikes like you are seeing.
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Terry,
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The glitch is downstream of your part of the circuit.? It's not in or coming from your voltage monitor or FET switches.
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Andy
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Re: removing crosstalk spike from a signal question

 

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I think you're looking at an anomaly from the simulator John. (maybe one "slice" analysis getting ahead of another?)? I reconstructed just the FET switches (no voltage monitor) and get spikes like you are seeing.



On 10/26/2024 4:36 AM, john23 wrote:

Hello , ?its CB capacitance of Q1 which passes the spike from the nagtive -12V pulse.

When I put a resistor between base and collector the pulse Vg2 gets moved exactly to the spike place(so no more spike issue).

However Q1 is a mechanism where I delay P12 signal by delaying the Vbe of Q1.

now that I add a resistor between base and collector ther is no more delay?

Is there some solution to this problem?

Thanks.?



Re: removing crosstalk spike from a signal question

 

On Sat, Oct 26, 2024 at 05:36 AM, john23 wrote:

Hello , ?its CB capacitance of Q1 which passes the spike from the nagtive -12V pulse.

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Sorry, I completely missed (did not see) that reply.? It was hidden under the first one.
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Andy
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Re: removing crosstalk spike from a signal question

 

On Sat, Oct 26, 2024 at 07:04 AM, wn4isx wrote:
Taming EMC (electromagnetic compatibility) issues is part black magic.
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There was a book some years back by an expert in signal integrity, with the title "High Speed Digital Design: A Handbook of Black Magic".? That title says a lot.? His later book was "High Speed Signal Propagation: Advanced Black Magic".
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To the newcomer it looks like black magic, but it is actually logical once you figure out what's going on.? Signal integrity and power integrity engineers do that sort of thing.? Current is just as important as voltage, maybe more important.
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Andy
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Re: removing crosstalk spike from a signal question

 

On Sat, Oct 26, 2024 at 07:04 AM, wn4isx wrote:
Do you have a fast oscilloscope (preferably DSO)? And actually verify the spikes?
Try more low ESR capacitance on V+/V- lines, conssder adding low value inductor with capacitor [LC] filter circuit between V+ and high current switches.
Taming EMC (electromagnetic compatibility) issues is part black magic.
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I think that is a spike seen in simulation.? Not in hardware.? I don't think he built it yet.? But I may be wrong.
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As you know, sometimes simulations go beyond what's reasonable and show effects you can't actually see when you build it.? But if you have good models, your simulations should come pretty close.
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John23, what is the pulsewidth of that glitch?? Is it wide enough to be worth worrying about?? If it is something like 10 ps wide, you might argue that it won't go anywhere.? Simulations have bandwidth from DC to light (well, almost).? Real circuits do not.? Wires get in the way.
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The spike might come from capacitive coupling from Gate to Drain in one or both MOSFETs.? All MOSFETs have that and it can't be avoided, but different MOSFETs have different amounts of it so you can choose MOSFETs with lower Cgd.? When their Gate pin toggles, the dv/dt couples to the Drain which is still briefly a high impedance.? You can slow the dv/dt at the Gate, which might help.? You can reduce the voltage that gets coupled to the Drain with a capacitive voltage-divider (that is, add capacitors Drain-to-ground) which might help.? Or you can slow it further downstream in the direction of the Vg2 node.? I am not certain this is the mechanism by which the glitch happens, but it is a likely one.? I did not simulate it yet.? You (john23) have this on your computer already, and you can simulate it and witness first-hand where and how the coupling happens.? I urge you to do that.? Be an engineer and investigate how it gets there, and what you can do about it.
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Andy
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Re: removing crosstalk spike from a signal question

 

On Sat, Oct 26, 2024 at 04:07 AM, john23 wrote:

Is there a way to eliminate the spike shown below?

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Try a little capacitance.? Added in the right place, it can greatly reduce spikes.
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What is "the M12 signal"?
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Your schematic has embedded links to files on your computer (.lib C:\Users\yefimv\Documents\ADS\terry2\DMG6602SVTQ .spice.txt) making it not portable to other computers.? I think you need to delete those new symbols from the schematic and then add them back.? (This is a somewhat annoying "feature" of LTspice, that it saves some hidden symbol attributes within the .asc file, even if a later version of that symbol changes them.)
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It is not a good idea to use library filenames that have spaces.
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Andy
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Re: removing crosstalk spike from a signal question

 

Hello , ?its CB capacitance of Q1 which passes the spike from the nagtive -12V pulse.

When I put a resistor between base and collector the pulse Vg2 gets moved exactly to the spike place(so no more spike issue).

However Q1 is a mechanism where I delay P12 signal by delaying the Vbe of Q1.

now that I add a resistor between base and collector ther is no more delay?

Is there some solution to this problem?

Thanks.?


removing crosstalk spike from a signal question

 

Hello ,The following circuit is a full sequencer.
However the signal in Vg2 has a certain spike which caused by the M12 signal doing some kind of cross talk using some capacitor probably.
Is there a way to eliminate the spike shown below?
Ltspice files are attached.

Thanks.

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/g/electronics101/files/john233/tt.zip


Re: representing SR flip flop switches

 

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John, Don't know why I got so tunnel visioned on this. You can replace the FETs with any generic model (say nmos, pmos) if you want. I just used the DMGx to see it the spice models worked!

So, if you're still having problems with it...try substituting the pmos component for U6.


Re: representing SR flip flop switches

 

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I copied the file from the wrong folder John. The file I copied was an older file where the P channel FET is wired incorrectly.

I changed the schematic so that 30 is the source (connected to V+), 20 is the gate (connected to R6-U2 collector) and 10 remains connected to the output. I replaced the old voltageMonitor.asc in the groups.io 'file' section with the corrected file renamed TestvoltageMonitor.asc.

The corrected file is posted in the groups.io 'file' section in the same folder as before.



On 10/24/2024 3:51 PM, john23 wrote:

Hello Terry,As you can see in thelink of the photo Pmos drain is not creating a +12V pulse on the output.
The NMOS drain creates -12V very well
What could cause such a behavior in the PMOS drain?
LTspice portable folder is attached in the link below.
If its comfortable i could contact by E-mail also,to what E-mail i should contact regarding a converstaion about this circuit?
Thanks.


Re: LED driver board for 18650 torch

 

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Thank you, I am well aware of the dangers of UVC, but thanks for the warning.

Dave


On 24/10/2024 22:16, wn4isx wrote:

Again, I feel an obligation to warn you that UV C can really fry your eyes, probably faster then you'd believe. I wear deep orange forensic safety glasses when I go exploring for minerals with our UV C handheld light.
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Sadly the world today has made it cheaper to purchase many items rather then roll your own.
At the same time we have items even world class electronics labs didn't have in 1974.
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Re: representing SR flip flop switches

 

Hello Terry,As you can see in thelink of the photo Pmos drain is not creating a +12V pulse on the output.
The NMOS drain creates -12V very well
What could cause such a behavior in the PMOS drain?
LTspice portable folder is attached in the link below.
If its comfortable i could contact by E-mail also,to what E-mail i should contact regarding a converstaion about this circuit?
Thanks.
/g/electronics101/photo/296358/3846062?p=Created%2C%2C%2C20%2C2%2C0%2C0


Re: LED driver board for 18650 torch

 

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Thanks - it turns out it's cheaper to buy a torch.
Dave


On 24/10/2024 19:43, wn4isx wrote:

Re UV C LEDs, use drivers intended for them! Regular drivers get confused with the no load until ~6V and tend to pulse and might fry your expensive UV C LED.
BTDT.
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Re: representing SR flip flop switches

 

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The group owner can certainly change the setting requiring that files be uploaded, rather than attached to emails, but there are serious security issues with allowing random attachments. Any bad actor could sign up, go away for a while or participate in the group, then drop a virus or worm or any other malware on many group members.?

Requiring an upload means that the files aren't automatically distributed to everyone. In addition, many corporate mail systems will not allow emails with attachments at all, so users behind such systems would not be able to participate in the group.

Some groups require that all files associated with a problem be uploaded as a compressed archive, preserving their association, and preventing proliferation of many hairy, oddly named directories in the files section (and saving space at the same time.)

All in all, it works quite well.

Donald.

On 10/24/24 14:03, Roy J. Tellason, Sr. wrote:

On Thursday 24 October 2024 11:25:35 am Terry wrote:
I do not like this groups.io method of having to "add" folders and files
to an obscure depository somewhere "out in the cloud."...it is so much
easier to simply attach a file using normal email...
That isn't groups.io,  it's a setting chosen by whoever set up this group in the first place.  Other ones I have flowing in here allow attachments,  which can get a little bulky sometimes.  I don't know offhand if this is something that a group owner can change,  or not.

--
Member of the toughest, meanest, deadliest, most unrelenting -- and
ablest -- form of life in this section of space, ?a critter that can
be killed but can't be tamed. ?--Robert A. Heinlein, "The Puppet Masters"
-
Information is more dangerous than cannon to a society ruled by lies. --James
M Dakin






Re: representing SR flip flop switches

 

On Thursday 24 October 2024 11:25:35 am Terry wrote:
I do not like this groups.io method of having to "add" folders and files
to an obscure depository somewhere "out in the cloud."...it is so much
easier to simply attach a file using normal email...
That isn't groups.io, it's a setting chosen by whoever set up this group in the first place. Other ones I have flowing in here allow attachments, which can get a little bulky sometimes. I don't know offhand if this is something that a group owner can change, or not.

--
Member of the toughest, meanest, deadliest, most unrelenting -- and
ablest -- form of life in this section of space, ?a critter that can
be killed but can't be tamed. ?--Robert A. Heinlein, "The Puppet Masters"
-
Information is more dangerous than cannon to a society ruled by lies. --James
M Dakin


Re: representing SR flip flop switches

 

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It's important to understand John, this is only a demonstration of a use of the NCV33361 voltage monitor chip, and the DMG6602 FET pair. It is NOT a valid or certified circuit diagram for wiring. Using LTspice is a very convenient way to verify circuit theory and operation.

In the groups.io 'files' section is folder VoltageMonitorSpice containing the .asc .asy files for the components, and I just added the .asc file for the circuit (voltageMonitor.asc).

There is no .lib file tying them all together.

Try this: Put all the files in one folder on your computer. Open the voltageMonitor.asc file in LTspice...it should show the complete schematic. I believe if the .asc and .asy files for the components are in the same folder as the spice circuit your using (voltageMonitor.asc) LTspice will "figure it out" and use the origin folder to find the component models.

Otherwise, you are going to have to recreate the schematic, download the spice files for the NCVxx and DMGxx components and create the components models in the LTspice "autogenerated" folder. This is easy to do...just confusing.

I do not like this groups.io method of having to "add" folders and files to an obscure depository somewhere "out in the cloud."...it is so much easier to simply attach a file using normal email...so if you want to continue on this path to test and simulate the voltage monitor and FET switchs...let's take it to normal email. I am good in the FCC database as WA7LGY.?
Terry



On 10/24/2024 9:27 AM, john23 wrote:

Hello Terry, Where did you put the files.
I looked at the link below, there is no LIB file of the ?NCV33361 compinent.and the circuits inside is very different from what you described in the photo.
Could you please upload the files of the updated circuit?


Re: A very good contact cleaner

 

This stuff? I use it to lubricant my bike!?


Re: representing SR flip flop switches

 

Hello Terry, Where did you put the files.
I looked at the link below, there is no LIB file of the ?NCV33361 compinent.and the circuits inside is very different from what you described in the photo.
Could you please upload the files of the updated circuit?
Thanks.
/g/electronics101/photo/298497/3845495?p=Created%2C%2C%2C20%2C2%2C0%2C0

/g/electronics101/files/VoltageMonitorSpice


Re: LED driver board for 18650 torch

 

I am only guessing here, but it seems likely that your UV-C "LED" is not just the LED but includes a driver circuit too.? Hence the higher voltage.
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Would it be possible to either (a) find another UV-C LED that is just the LED, or (b) pick out the LED from the unit you have and separate it from its old driver circuit?
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Since LED's forward voltage is greater than ordinary diodes, and vary greatly depending on spectrum and composition, one might need to settle for the fact that it is not simple to accommodate different LEDs without major redesign, and possibly use a step-up converter.
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Andy
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LED driver board for 18650 torch

 

Hi, I am looking to upgrade (?) a torch that uses a single 18650 battery from white light to a UVC LED.

The UVC leds need 5-6V to work but my searching on Fleabay and AliExpress have only yeilded 10W 20mm
driver boards that work at these voltages.

Can anyone suggest a source or a solution ??

Dave