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Re: incrementable voltage counter

 

Why not a couple of flip-flops (in a cascade counter) and an R-2R ladder?

Jim Wagner
Oregon Research Electronics

On May 19, 2014, at 9:59 PM, helmutsennewald@... [LTspice] wrote:

?

Hello Henry,
Sorry, I forgot it's only a divider, but not a counter.
Now I recommend to simply use a chain of D-flipflops for a counter with binary outputs.

The mentioned example "A_counter_test.asc" had mistakes with the symbol and the comment.
I have uploaded a corrected example "A_counter_test.asc"-

Files > Tut > Digital A-Devices > A_counter_test.asc

?
Best regards,
Helmut
Re: Current Step Algorithm

 

Hello Henry,

Any flipflop needs a parameter Td and/or Trise. I have mentioned this many times in this forum.

Best regards,
Helmut
Re: incrementable voltage counter

 

Hello Henry,
Sorry, I forgot it's only a divider, but not a counter.
Now I recommend to simply use a chain of D-flipflops for a counter with binary outputs.

The mentioned example "A_counter_test.asc" had mistakes with the symbol and the comment.
I have uploaded a corrected example "A_counter_test.asc"-

Files > Tut > Digital A-Devices > A_counter_test.asc

?

Best regards,
Helmut
Re: Current Step Algorithm

ehydra
 

I don't think I have the whole overview what do you want!

I hopefully don't be killed by bullets from Mike...
Here this circuits counts up three-times and then down twice controlled by input CLK and DIR and the dynamic count status is a single voltage output:


You can now modify my idea in musings...

A DFF without td is a bad idea. Sometimes it didn't work. I have no clue what is the reason.

If you don't need exact voltage/current steps you can use idt().

Have fun!
- Henry


tindelsurf@... [LTspice] schrieb:

Hi...
I'm trying to get a behavioral current source algorithm to increase or decrease the amount of current every 1ms based on a window comparator. I have a couple D-FF's with 0 prop delay and it's working, but the simulation is SLOW about 10 minutes for 500ms simulation.... I'm trying to speed it up a bit.
Right now I have:
I=if(v(rise_edge)==1,if(v(count_up)==1,I(B3)+0.5,if(v(count_down)==1,I(B3)-0.5,I(B3))),I(B3))
where V(rise_edge) is a D-FF rising edge detector with 0 prop delay and 0 rise time.
V(count_up) and V(count_down) is the output of a window comparator that is typically sent to a FPGA and the FPGA increases or decreases the current.
I(B3) is the behavioral current source
Any other bright ideas on how to sense the rising edge and count up or down only once on the rising edge of the clock (or every 1ms of simulation?)
Re: incrementable voltage counter

ehydra
 

Hi Helmut -

And it counts 0, 1, 2, 3 at the output line? I cannot see this functionality.

- H.


helmutsennewald@... [LTspice] schrieb:

Hello Henry,
There is an A-device counter in LTspice. See the example "A-device_counter.asc" from the link below.
Re: incrementable voltage counter

ehydra
 

Look for counter_3.zip !

- H.


Vlad imbvlad@... [LTspice] schrieb:

Speaking of which, it seems that the AND gate cannot be used by renaming
AND to COUNTER (and using cycles/duty). Still, it's a shame it doesn't have
incremental voltage at the output.
Re: LTspice] Re: Simulator stops and crashes the whole computer?!

 

Something similar happened to my daughter's laptop when she watched movies. The laptop would get very warm and then freeze up. A Google search showed that enough lint would accumulate in the fins of the heatsink causing the cpu to overheat. This Dell laptop had provisions to remove a bottom cover to inspect the heatsink. I found a huge wad of lint trapped in the heatsink blocking all air flow. Removed the lint and problem solved.



On May 19, 2014, at 7:21AM, "Dave Wade dave.g4ugm@... [LTspice]" wrote:

?

There might also be BIOS updates to switch the fan on sooner, or slow the CPU down more quickly when it gets over warm...


On 19 May 2014 12:51, ehydra ehydra@... [LTspice] <LTspice@...> wrote:
Open the Laptop inside and clean the heat-pipe heatsink block by
pressing air in the opposite direction thru it.

There are system monitor progs showing CPU/main-board temperature.
Approx. 60¡ãC is the maximum temp. good for CPU.

- H.

schloechen@... [LTspice] schrieb:
> This sounds reasonable, after another crash I removed the laptop from my docking station and the bottom plate was really warm/hot. Another attempt with reduced cores usage (its a quad core), where I used one instead of four cores and the simulation finished without any problems.
> Now I'm not sure if and how I should work on the interior of my machine to increase its thermal behaviour.



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Re: LTspice voltage source

 

If you are in the market for an actual (physical) waveform generator, then I'd say this question has definitely crossed the line of what is not appropriate for this email group.

I'm sure there are many other sources 'out there' that can help you find what you are looking for. ?I believe this group is not one of them.

Regards,
Andy
Re: LTspice voltage source

Sam Jesse
 

Ltspice has a nice future which is .step param or sweep.
Is there an AWG with such capability as well as ability to optimize parameters based on feedback from outputs?
Does not need a customer made solution of uContorl(s)?

Thank you


On Tue, May 20, 2014 at 6:09 AM, Jim Wagner wagnejam99@... [LTspice] <LTspice@...> wrote:
?

Its called "Programmable Power Supply" though such supplies rarely are able to generate waveforms. For that, you would need an "Arb" (Arbitrary Waveform Generator).

Jim Wagner
Oregon Research Electronics

From: "Sam Jesse revrvr@... [LTspice]" <LTspice@...>
To: LTspice@...
Sent: Monday, May 19, 2014 12:57:37 PM
Subject: [LTspice] LTspice voltage source

?


Hi

What needs to be done in order to have a (LTspice_like) flexible voltage source where parameters are adjustable on a micro controller?
Can I use some concepts from the Lib file of Ltspice Voltage component for example or how do I go about it?

Thank you
Current Step Algorithm

 

Hi...

I'm trying to get a behavioral current source algorithm to increase or decrease the amount of current every 1ms based on a window comparator.? I have a couple D-FF's with 0 prop delay and it's working, but the simulation is SLOW about 10 minutes for 500ms simulation.... I'm trying to speed it up a bit.

Right now I have:

I=if(v(rise_edge)==1,if(v(count_up)==1,I(B3)+0.5,if(v(count_down)==1,I(B3)-0.5,I(B3))),I(B3))


where

V(rise_edge) is a D-FF rising edge detector with 0 prop delay and 0 rise time.

V(count_up) and V(count_down) is the output of a window comparator that is typically sent to a FPGA and the FPGA increases or decreases the current.

I(B3) is the behavioral current source


Any other bright ideas on how to sense the rising edge and count up or down only once on the rising edge of the clock (or every 1ms of simulation?)


Thanks,
JH
Re: LTspice voltage source

 

Its called "Programmable Power Supply" though such supplies rarely are able to generate waveforms. For that, you would need an "Arb" (Arbitrary Waveform Generator).

Jim Wagner
Oregon Research Electronics

From: "Sam Jesse revrvr@... [LTspice]"
To: LTspice@...
Sent: Monday, May 19, 2014 12:57:37 PM
Subject: [LTspice] LTspice voltage source

?


Hi

What needs to be done in order to have a (LTspice_like) flexible voltage source where parameters are adjustable on a micro controller?
Can I use some concepts from the Lib file of Ltspice Voltage component for example or how do I go about it?

Thank you
Re: PA10M schematic problem (izzydad2000)

 

Jim's file upload also included this in the description:

? ?"The issue is a port(pin) mismatch. The subckt has 8 pins not in the 1,2,...8 format. Numbering the pins on the symbol 1..8 doesn&#39;t help.
? ? Must the subckt definition be edited also?"

We can't figure out the port(pin) mismatch because you didn't include the right files. ?The implication is that the symbol (.ASY file) has a different number of pins than the .SUBCKT line has.

Regarding the question "Must the subckt definition be edited also?", the answer is no. ?The actual net names called out in the .SUBCKT definition line, do not matter. ?Those net names are local to the subcircuit and can be anything, including non-numeric names.

What matters is that the symbol has the same number of pins, as those in the .SUBCKT line. ?Their order follows the SpiceOrder in the symbol's Pin List/Netlist Order (View > Pin Table). ?The pin with SpiceOrder=1 should correspond to the first net in the .SUBCKT line, and so on.

Regards,
Andy
LTspice voltage source

Sam Jesse
 

Hi

What needs to be done in order to have a (LTspice_like) flexible voltage source where parameters are adjustable on a micro controller?
Can I use some concepts from the Lib file of Ltspice Voltage component for example or how do I go about it?

Thank you
PA10M schematic problem (izzydad2000)

 

Jim (izzydad2000) uploaded the file PA10M.zip. ?The description reads:

This is a correction to an earlier attempted upload. This zip file contains a schematic, a symbol for the PA10 amplifier, and the model (subckt) for the PA10M.

?The problem right away is that it is missing the symbol for the part "PA10M" which is on the schematic. ?That error message happens when opening the schematic file "PA10M coil amp.asc".

But there is a symbol named "PA10" that you included.

Renaming that symbol file to "PA10M" lets the schematic load without the error ... however, the symbol does not fit the schematic! ?The connections are all wrong (pins do not touch nets).

Please fix your schematic or your symbol so that they can be opened without error. ?If uncertain about what you have, make a brand new directory on your computer and unzip your ZIP file into it, and see if the schematic opens without error and that it looks right. ?If it seems right to you, then maybe you didn't follow the group's advice never to add models or symbols to LTspice's library area. ?If you did, then you need to include those too in your ZIP file.

Regards,
Andy
Re: Heirarchy and voltage sources

 

Hello Andy,

> There is a way in LTspice to reference nets in a different level by reference to the name (some sort of special shortcut) even if the net was not brought out to a pin, but I don't remember what that is.

Global nets can be either defined with

.GLOBAL nodename1 nodename2 ....

or simply with a $G_ prefix, e.g. $G_in1 .

I have to admit that I can't remember having used global nets in the last ten years.

Best regards,
Helmut

.GLOBAL -- Declare Global Nodes

Syntax: .global <node1> [node2 [node3] [...]]

Example: .global VDD VCC

The .global command allows you to declare that certain nodes mentioned in subcircuits are not local to subcircuit but are absolute global nodes.

Note that global circuit common is node "0" and that a .global statement is not required. Also, node names that of the form "$G_" are also global nodes without being mentioned in a .global statement.
Re: incrementable voltage counter

 

Speaking of which, it seems that the AND gate cannot be used by renaming AND to COUNTER (and using cycles/duty). Still, it's a shame it doesn't have incremental voltage at the output.


Vlad
______________________
-- holding, among others:
a universal analog/digital filter, block-level models
for power electronics (and not only), math blocks
with a more stream-lined approach, some digital
ADC, DAC, (synchronous-)counter, JKflop, etc.
Re: POWER TRANSISTORS

 

ebotsmith?wrote:

? ?"Please can someone tell me where I can find power transistors in LTSpice"

Some power transistors are already in LTspice. ?If you just want any power transistors, you don't need to look anywhere.

If you want models for specific transistor types, first try the group's archives, then try the transistor manufacturers. ?As a last resort, if all else fails, try Google.

David Turchi, thank you for the models, but please do not attach models to group messages. ?Please upload them to the "Temp" directory on the group's Files area.

Andy
Re: Heirarchy and voltage sources

 

Richman wrote:

? ?"For example I have a bias source I call "pref" which is wired to a voltage source with a value of +10. ?The same name occurs in the lower level schematics."

When you talk about names, are you referring to names you have assigned to the voltage sources, or do you mean Net names (a.k.a. node names)?

In SPICE, device names can be replicated throughout your design hierarchy. ?Device names do not map through the hierarchy and they are all distinct.

Net names, other than GND or node 0, connect ONLY if you make them connect. ?A net named "foo" at one level is distinct from a net named "foo" in any other part of the hierarchy, unless you connect them through pins on the lower level schematic symbol. ?Even then, the fact that they happen to share the same net name, is irrelevant. ?The connection through pins, is what makes them connect.

There is a way in LTspice to reference nets in a different level by reference to the name (some sort of special shortcut) even if the net was not brought out to a pin, but I don't remember what that is. ?I've never used it myself and don't recall if I have seen it used in the examples in this group.

Regards,
Andy
Re: incrementable voltage counter

 

Hello Henry,

There is an A-device counter in LTspice. See the example "A-device_counter.asc" from the link below.

?

Best regards,
Helmut
Heirarchy and voltage sources

 

Hello all:


In a heirarchial schematic I have power supply voltage sources in the highest level schematic and also

in lower level ?schematics. ?For example I have a bias source I call "pref" which is wired to a voltage source with a value of +10. ?The same name occurs in the lower level schematics. ?I can run the lower level schematics on their own, or as part of the whole.


Which voltage source does LT Spice use to run the highest schematic page. Does the highest page take precedence over the subpages, or is each one running on the power from each individual page ? ?


What I'm trying to do is find out the total power consumption of the circuit. Is there a better way (structurally) to achieve this purpose ?


Thanks

Richman
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