Re: Run LTSPice simulations programmatically with different settings (solver)
You can use the command line switches "-norm" and "-alt" for that.
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Starting with version 24.1, there is also an option ".options solver=..." you can set in the schematic / netlist.
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Best Regards,
Mathias
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PS: All this is very well described in the help file. But who has time ...
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On Thu, Feb 6, 2025 at 06:37 PM, <jkayzerman@...> wrote:
It came up that my engineer wants to run certain simulations with the normal solver and other simulations with the alternate solver. This requires changing application settings and is not something that can be baked into simulation file.
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Re: Trying to use .MOD file in schematic
Hi Andy, yes you are correct on your first supply about what attributes I want.
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The method I used is from this website.
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I am trying to simulate a ferrite bead in my circuit.?
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Here is the location I put it in. "C:\Users\WilliamFinley\AppData\Local\LTspice\lib" The .include "..." put the MOD file in the symbols library and I was able to open the text document stating how it was going to work. Thats why I have to use the SUBCKT name.
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Thanks, and please tell me more of what I can do to get this working.
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Will?
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Re: Run LTSPice simulations programmatically with different settings (solver)
It might not work, because there would need to
be two '.ini' files that could not have different names. Maybe
have one installation in Program Files and one elsewhere.
On 2025-02-06 17:54, thutches via
groups.io wrote:
Perhaps you could have two installs of LTspice, one with
Normal solver selected and one with the Alternate solver.? Your
script could just pick the desired one to execute.
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Not tried this but I did check that the settings are sored
with the installations so it just might work.
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Tim
--
OOO - Own Opinions Only
Best Wishes
John Woodgate
Keep trying
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Re: Run LTSPice simulations programmatically with different settings (solver)
Perhaps you could have two installs of LTspice, one with Normal solver selected and one with the Alternate solver.? Your script could just pick the desired one to execute.
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Not tried this but I did check that the settings are sored with the installations so it just might work.
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Tim
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Re: LTSpice AC simulation
It is quite common to use two sources of identical amplitude but opposite phase to simulate a balanced source.
Or three sources 120¡ã apart to simulate a 3-phase source.
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Run LTSPice simulations programmatically with different settings (solver)
I am working on a project to programmatically run LTSpice simulations on a server. I am using the command line interface to kick off the process from a python script and everything works as expected. The command I am using is this?
"C:\Program Files\ADI\LTspice\LTspice.exe" -b -run "mySimulation.asc"
It came up that my engineer wants to run certain simulations with the normal solver and other simulations with the alternate solver. This requires changing application settings and is not something that can be baked into simulation file. It looks like there is a way to do this by passing an ini file so the command looks like this:
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"C:\Program Files\ADI\LTspice\LTspice.exe" -b -run -ini "customSettings.ini" "mySimulation.asc"
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However the terminal freezes when I try this and the simulation does not run. Does anyone know why this is?
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I am aware of PyLTSpice and perhaps that is what I should be using instead of kicking off terminal commands? But it doesn't seem to have a way to change this setting so it doesn't help me in this scenario.
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I am using version 24.0.12
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Your help is greatly appreciated!
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Re: LTSpice AC simulation
I'm guessing "CS" means Common Source.
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Andy
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Re: LTSpice AC simulation
We don't.? We don't always use 1 V at 0 deg., that is.
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I often use 2V, especially with RF or matched impedance circuits.? It gives you 1 V into a matched load.
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You can use whatever values you want.? Using other than 0 degrees is likely confusing, but use it if you want to.
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Very often we want to see something like "gain", which is Vout/Vin.? By making Vin = 1 V at 0 degrees phase, it makes it easier because it disappears from the equation and can be omitted.? Easier for you.
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Remember that .AC is strictly linear so everything scales linearly.
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Andy
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Re: LTSpice AC simulation
We set the signal source for .AC simulation to
amplitude 1 and phase zero so that they act as the references
for amplitude and phase, which are required in order to report
the amplitude and phase of the output signal. The output
amplitude is calculated as a ratio - output/input, so that '1'
isn't really 1 volt, it's just '1'. You could set it to any
number and it would make no difference to the reported output
number. But the phase reference really is 0 degrees, and the
output is given in degrees, not any sort of ratio.
What is a 'CS amplifier'? It's best not to use
abbreviations in messages, except perhaps for really well-known
ones like AC and RMS.
Why we always give AC amplitude as 1V and Phase as 0degree
for AC analysis & not any other values. I'm designing a CS
amplifier that's why I am asking, why always 1V and 0 phase
shift? Please explain
--
OOO - Own Opinions Only
Best Wishes
John Woodgate
Keep trying
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Why we always give AC amplitude as 1V and Phase as 0degree for AC analysis & not any other values. I'm designing a CS amplifier that's why I am asking, why always 1V and 0 phase shift? Please explain
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It refers to the use of a plumb line. I have one made of bronze.
I have never seen the word used in this context, English is not my native language and here they sometimes use words and abbreviations that confuse me.
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On Wednesday, February 5, 2025 at 01:44:54 PM GMT-5, Richard Andrews via groups.io <richardandrews.ma@...> wrote:
My Grandfather used to say "make sure it's plumb" meaning make sure it's perfectly vertical. He used to be a handyman and mason.
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Re: Over-voltage protection circuit does not work as expected
Jerzy, the problem is not the speed at which the overvoltage is detected, but whether it is a transient or not. You have to wait and see if the voltage returns to low values (a ringing) or if it remains high. Only in the second case do you have to trigger the triac and open the circuit. Otherwise, you will open the circuit incorrectly ??
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Re: Any Good Reason to Create a Hierarchical Connector and Conductors to Route (Plumb) Ground Out of a Hierarchical Schematic
Hello All:
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On Wed, Feb 5, 2025 at 02:06 AM, eewiz wrote:
On Wed, Feb 05, 2025 at 9:25 AM, Andy I wrote:
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I am pretty sure this has nothing to do with version 24.1.1.? I think LTspice has always behaved this way - going back at least as far as LTspice IV and probably earlier.
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I did not wish to imply that 24.1.1 had any special status related to the findings I wrote about.
I simply meant to inform others that the work was conducted on 24.1.1.
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On Wed, Feb 5, 2025 at 02:06 AM, eewiz wrote:
After running the sim, nothing changes outside the block, still ground on one side of the resistor and V(n030) on the other side connected to the RTN hierarchical connector.
Inside the block, the RTN hierarchical connector still says "Click to plot V(n030)" but, the net connected to that RTN hierarchical connector now says "This is ground."
On Wed, Feb 05, 2025 at 9:25 AM, Andy I wrote:
That observation is incorrect.? The net that LTspice labels "ground" in the lower-level schematic, is not actually ground when it becomes connected to the higher-level schematic.? Therefore the resistor outside the block is NOT connected to ground on both ends.? It must not disappear from the netlist, because it really is there!
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Now I understand what is happening.
On the top level, if that hierarchical net is disconnected from node 0 and then connected to a net with 1 volt, it will effect operation of the sub-circuit as expected even though that net remains connected to node 0 inside the sub-circuit.
LTspice does ignore those connections to node 0 made within a sub-circuit except:
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Inside the sub-circuit, probing that net says "This is ground."
Imagine that net is connected to the anode of a TL431 2.5V reference.
If you plot V(cathode)-V(anode) across the TL431 you get 2.5V.
If you plot V(cathode) you get 3.5V.
You see a quite confusing output, 3.5V above ground, from a 2.5V reference, because LTspice does not show the true 1 volt on that net.
It always says "This is ground." when probing that net, that in this example, actually has 1 volt on it.
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So, to avoid future probing confusion, I will remove (label 0) ground symbols from sub-circuit schematics and physically re-connect isolated net segments.
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Tony Casey suggested using the COM net (with its own triangular symbol) but, that has the same issue.
The COM symbols make the connected net say "This is node X1:COM." which is no better than node 0's "This is ground." message.
In either case, you can't see if there is any voltage on the net and you can't plot the net voltage because LTspice thinks it's a ground net.
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On Wed, Feb 05, 2025 at 9:25 AM, Andy I wrote:
It is actually reasonable to draw a lower-level schematic, where a net is called "ground" locally (using the triangle symbol), but also goes to an I/O pin (with a box around it).? That ENABLES you to selectively "override that ground".? If the higher-level schematic doesn't connect to the pin, it remains ground.? If the higher-level schematic connects it to +150 V, that net becomes not-grounded and has +150 V on it.? Think of it as a feature you didn't realize was there.
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Yes, I understand but, the issue is that the probe won't show the +150 V on that net and can't plot the +150 V on that net and can't .meas the +150 V on that net, unless all ground symbols are removed from that net.
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All for now.
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Re: Any Good Reason to Create a Hierarchical Connector and Conductors to Route (Plumb) Ground Out of a Hierarchical Schematic
It is all about context.? Context changes everything.
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I uploaded "Hierarchy_netnames.zip" which illustrates how the netnames change due to context.? It has five instances of lower-level schematics, each consisting of one resistor.? The pins connect to its symbol, and from there to nets on the top-level schematic.? LTspice "connects" them by making their netnames the same, so they are truly ideal connections with zero added resistance.
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(1)? Open MyRes1.asc, one of the lower-level schematics.? Hover over the top net and see that its netname in this view is "Top".? The context here is in isolation, not part of the main simulation.
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(2)? Then open Top_Level.asc which is the top-level schematic.? Now right-click on the X1 symbol and click "Open Schematic".? This opens that particular instance (X1) of MyRes1.asc.? Hover over the top net.? Notice its netname has changed from "Top" to "AAA".? It inherited the netname from the top-level schematic.? That is what happens whenever a subcircuit or a lower-level schematic is connected to nets in the next higher schematic.? The netnames in the lower-level schematic effectively change to match those of the higher schematic.
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This is where context matters.? By opening MyRes1.asc in isolation (by double-clicking on it in Windows Explorer), it has no context, and it must use the netnames printed on that schematic even though they will not be used.? By opening MyRes1.asc from the top-level schematic, you have given it context.? You have chosen that one instance (X1) of that lower-level schematic, and LTspice rewards you by showing the adjusted netnames as they exist in the main circuit.
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(3)? Open MyRes3.asc from Windows.? Hover over the top and bottom nets and note their netnames.? The upper netname is "Top" and the lower netname is 0 or ground.? That is correct in this context because connections have not been made to any other schematic's nets.? Those are temporary netnames.
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(4)? Now open Top_Level.asc again.? Do these steps in this order:
- Right-click on the X3 symbol and click "Open Schematic".
- Go back to the top-level schematic and click Run.
- Go back to the schematic representing?X3, which is already open in LTspice.
- Hover over the nets and note their new netnames.
(LTspice has a wee synchronization issue, making it necessary to do these steps in this order.)? The former "Top" net has inherited the netname "DDD" from the Top_Level schematic.? The bottom netname is no longer ground!? It has inherited the netname "EEE" from the Top_Level schematic, replacing node 0.
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Like I say, context changes everything.? By viewing the schematic of that one instance (X3) of the lower-level schematic, you see what the netnames change to.? What you thought was ground, is now a different net, named "EEE".? That is true only in this context.? Without context, the lower net looked like ground, which was a temporary netname.? Context is everything.
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What's going on is basically this:? On lower-level schematics or in subcircuits, expanding the SPICE netlist causes every net that goes to a pin to have its netname changed.? All of them inherit the netnames of the nets they connect to in the next higher hierarchy level.? LTspice does that uniformly, making no exception for node 0 - even node 0 changes to another name.? You see that only in the context where it is part of the top-level schematic.? Without that context, it appears to be ground, but that was just a place-holder.
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I was wrong about something.? I thought that if you left the net not connected to anything in the top-level schematic, it would revert to ground.? But alas, it does not.? Even floating pins without wires have netnames, and it picks up that netname instead of defaulting to ground.? Therefore, the usefulness of grounding a net on a lower-level schematic, and simultaneously bringing it out on a pin that can go somewhere else, seems awfully limited -- to the point that I don't see very much reason for doing that.? I can envision a few reasons to do it anyway, to modify one schematic to use as a lower-level block without making extensive manual edits.? But?it seems not useful to draw a new schematic that way.
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I hope some of this makes sense.
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Andy
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Re: Over-voltage protection circuit does not work as expected
I get an aborting notice. Sim quits before it starts with "unknown schematic syntax: V".
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I am running version 4.23.
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I can't run it on my 64-bit system because it is bricked. I have a new system coming later today.
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Re: Trying to use .MOD file in schematic
Model files (.MOD, .LIB, .SUB, .TXT, .whatever) can be added either to a schematic (.ASC file), or to a symbol (.ASY file) that then is placed on the schematic.? Exactly how and where you add the path to the model file, depends on which one it is.? We need more details to answer your concerns.
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Andy
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Re: Trying to use .MOD file in schematic
On Wed, Feb 5, 2025 at 10:36 PM, <william.finley@...> wrote:
I did .include "the file path to the mod file" but it says I need to right click a general part and include the subcircuit name for the value and erase spice model.
What said all that?? Did you watch a YouTube video?
Every time I put a generic part on the schematic and left click, it does not give me that table with all the categories I am suppose to fil in. It give me things like inductance, parallel capacitance, parallel resistance and DC resistance. How do I enact this .MOD file into a component so I can use it? Thanks.?
What kind of component are you doing this with?
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If it is an inductor, and if you need to make special edits to the component, do not either left-click or right-click on the inductor symbol.? Instead, use Ctrl-Right-click on the symbol.? That brings up the General Attribute Editor, where you can add to or edit each attribute.? If you just Right-clicked, then you get the special inductor editor that has special fields for things like Series and Parallel Resistance, and I'm guessing those were not the fields you wanted to edit.
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What is this .MOD file for?? Is it for an inductor?? For a transistor?? For a diode?? For an IC?
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It is rather unusual to use a model or .MOD file for an inductor, but I can't tell what you are trying to do with it.? Can you tell us more?
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Andy
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Trying to use .MOD file in schematic
I did .include "the file path to the mod file" but it says I need to right click a general part and include the subcircuit name for the value and erase spice model. Every time I put a generic part on the schematic and left click, it does not give me that table with all the categories I am suppose to fil in. It give me things like inductance, parallel capacitance, parallel resistance and DC resistance. How do I enact this .MOD file into a component so I can use it? Thanks.?
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Re: Over-voltage protection circuit does not work as expected
Dave, thanks for the advice. The ramp down is not needed indeed. Anyway, the original model of TLV1805 is a nice find. ? Jurek ? From: <[email protected]> on behalf of "Bell, Dave via groups.io" <Dave.Bell@...>
Reply to: <[email protected]>
Date: Wednesday, 5 February 2025 at 22:09
To: "[email protected]" <[email protected]>
Subject: Re: [LTspice] Over-voltage protection circuit does not work as expected
Resent from: <Dave.Bell@...>
Resent date: Wed, 05 Feb 2025 13:09:29 -0800 You¡¯re right - it does work! I found the output voltage curve a little confusing by itself, with the ramp Up and ramp Down. But reducing the output cap to 10u or increasing the load to 100 ohms, it became clear; it was just the slooow decay that looked weird. ? Dave ?
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From: [email protected] <[email protected]> On Behalf Of jerzy przezdziecki via groups.io
Sent: Wednesday, February 05, 2025 12:51 PM
To: [email protected]
Subject: EXTERNAL: Re: [LTspice] Over-voltage protection circuit does not work as expected? Yes, it¡¯s uploaded in TEMP as ¡°TLV1805_overvoltage_protection_circuit_works¡± ? Jurek ? Is there a circuit for this thread? Ild like to look at it myself when i get home. ? On Wed, Feb 5, 2025 at 3:41 PM, jerzy przezdziecki via groups.io I can imagine that crowbar is much better, but I would not be afraid about transients. This chip is extremally fast, a few ns. So ¨C as you said ¨C the TLV1805 is made for this purpose. Jurek ? I understand that overvoltage protection (OVP) must be a very simple and reliable circuit.
I've had a lot of problems with this circuit because sudden load variations can cause transients in the output voltage and reach high values triggering the triac! That's terrible.
Extreme situations can generate noise and lead to malfunctioning protection circuits.
My overvoltage detection, for this reason, is done by simple zener diodes and only components like the TLV1805 are suitable, as they have been designed for this purpose.
Because of these problems, in one specific case I used a microcontroller to trigger the crowbar. The microcontroller was able to distinguish between an overvoltage and a transient.
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Re: Over-voltage protection circuit does not work as expected
You¡¯re right - it does work!
I found the output voltage curve a little confusing by itself, with the ramp Up and ramp Down.
But reducing the output cap to 10u or increasing the load to 100 ohms, it became clear; it was just the slooow decay that looked weird.
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Dave
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toggle quoted message
Show quoted text
From: [email protected] <[email protected]>
On Behalf Of jerzy przezdziecki via groups.io
Sent: Wednesday, February 05, 2025 12:51 PM
To: [email protected]
Subject: EXTERNAL: Re: [LTspice] Over-voltage protection circuit does not work as expected
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Yes, it¡¯s uploaded in TEMP as ¡°TLV1805_overvoltage_protection_circuit_works¡±
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Jurek
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Is there a circuit for this thread? Ild like to look at it myself when i get home.
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On Wed, Feb 5, 2025 at 3:41 PM, jerzy przezdziecki via groups.io
I can imagine that crowbar is much better, but I would not be afraid about transients. This chip is extremally fast, a few ns. So ¨C as you said ¨C the TLV1805 is made for this purpose.
Jurek
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I understand that overvoltage protection (OVP) must be a very simple and reliable circuit.
I've had a lot of problems with this circuit because sudden load variations can cause transients in the output voltage and reach high values triggering the triac! That's terrible.
Extreme situations can generate noise and lead to malfunctioning protection circuits.
My overvoltage detection, for this reason, is done by simple zener diodes and only components like the TLV1805 are suitable, as they have been designed for this purpose.
Because of these problems, in one specific case I used a microcontroller to trigger the crowbar. The microcontroller was able to distinguish between an overvoltage and a transient.
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John Woodgate
thutches
Marcelo_Pessoa
eewiz
Bell, Dave