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I'm not against a repository of models - we already have one in the group 's Files section. But I am against trying usurp the standard libraries. Most people coming to this group, at least initially,

It sounds a very good idea, but keeping the same filenames could cause untold confusion. Is there any way of making the names different?? The only thing I can think of is making them all upper-case,

Hello All, Members could maintain a set of the standard.xxx files for use by the group. I've been doing that for many years now. If the group retained a set of maintained files in an easy to reach

Output is engraved on stone tablets. ====================================================================================== Best wishes John Woodgate OOO-Own Opinions Only www.woodjohn.uk Rayleigh,

There is also? JSPICE "JSPICE is a simulator for superconductor and semiconductor circuits, and is based on the general-purpose circuit simulation program SPICE2; it is incorporated with the

I wonder if it might be worth the while of those of us concerned about Analog Device's inaction in these matters to take to social media to suggest alternatives to LTSpice. With apologies to Arlo

I have uploaded an LTspice VDMOS model for the Onsemi BSS138 </g/LTspice/files/z_groups.io/Lib/BSS138.zip>. The uploaded zip includes a model validation report that compares the key

Dave, Of course he was, although I find it more instructive to show someone how it does work, rather than explaining how or why some other example does not work. All for now

eewiz, I think Bonkers was mixing absolute timing with relative timing notation. If you delete all of the + signs at the beginning of the lines, it makes pretty good sense, as absolute times. It took

Hello Christoph, Bonkers may be leading you down the primrose path. If you follow Bonkers' advice the length of bit[1] will be twice the length of bit[0] and the length of bit[2] will be three times

Kerim, can you simplify your 2-winding transformer model a little?? Having an ideal transformer at its core, I think you can "push" the other elements through it to the other side and combine them.?

OT: Obviously, implementing the push-pull topology is much easier than the bridge one. But this has a price: [1] The amplitude of the driving PWM voltage is doubled. It is from Vbat to –Vbat instead

Although I added a load, the new 3-winding model needs to act as LPF even without it, as in the case of the 2-winding one. I am afraid that with an open output, any leakage inductance cannot filter

Sorry, I uploaded it too.

Andy, You are right in all you said. I was somehow shy to upload what I tried doing because their responses were rather ridiculous :( So, I uploaded the schematic with a conventional 3-winding

The 74HC model is missing.

Kerim, But your 3-winding transformer: * is really just a 2-winding transformer but with a center-tapped primary (does that matter?); * is "perfect", with no leakage inductance. If the leakage

More: You don't see any LPF effect because you set K to 1, so there is no leakage inductance. If you set K to say 0.98 you will see a filtering effect.

Present: far too much stuff not relevant to the question of the transformer acting as a low-pass filter. Kerim, if you accept that a two-winding transformer acts as a low-pass filter, you should be

Missing: 74hc86.asy 74hc.lib Andy