If I may ask a follow up questionsabout Nano VNA-H.
1. Is port CH0 input a 50 ohm resistor load?
2. If #1 is correct, would proper attenuator implementation for the port be a series resistor, to form a L pad with the internal resistor?
3. If #2 is correct, would the open-short-load-done-save calibration be done with the measurement plane on the source end of the L pad?
4. If #3 is correct, would scale or another adjustment need to be done to account for a pad between Nano VNA and antenna under test.
btw- the parallel LC "trap" worked at the antenna tower and it reduced the nearby RF source down to less than 100 millivolts. Moving the measurement plane to "cancel out" the trap did not work for me. I was able to obtain presumably credible results by removing the measured impedance of the trap by itself from the measured impedance of the trap and antenna. What concerns me is DC resistance of the trap inductor in series with an antenna that might be 27 ohms at 55 ohms of capacitive or inductive reactance at the operating frequency.
Good news is I have not "blown up" the Nano VNA yet.
Thoughts or suggestions are appreciated. Thank you
