Hi,
I have my own schematics in structural vhdl and i'm
compiling it using alliance vhdl compiler, which
produces a hierarchical netlist with the components i
want to place and route in the alliance logical format
.al, which can be translated into EDIF(.edi),
SPICE(.spi/.sp/.cir), .vlg or .vst netlists. Are any
of these netlist formats amenable for kicad to import ?
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