You have an FPGA in the design. What is the FPGA doing that it
cannot communicate with a lowly parallel port?
--- In Electronics_101@y..., adityanewalkar@y... wrote:
Hi,
--- In Electronics_101@y..., "manifold" <manifold_1@y...> wrote:
Are you considering designing an ASIC to communicate with the
parallel port of a PC?
Yes. We r communicating with Parallel Port of PC.
BTW somebody was asking for more information about this. So here
goes:
There is FPGA on the board which will be interfaced to PC by
parallel
port. This requirement of Parallel Port interface cannot change.
Now
we r configuring this FPGA means that there is about 2 MEGABITS of
data to be transferred really fast. We r using EPP mode for the
transfer. The FPGA will be configured and give the output back to
parallel port. Now will I require an ASIC to control the
communication between FPGA and Parallel Port??
regds,
Aditya.
