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Single-phase H-bridge inverter circuit


 

Hello all!

I'm trying to design a circuit for my college project.
My load is purely resistive, so in theory, the waveform I should see across the resistor will be square-shaped with the same RMS voltage as the supply voltage (Vcc) of the circuit.
However, when I simulate my circuit, the waveforms appear distorted and noisy.
Could someone check if there's something wrong with my circuit or suggest any ideas?

I suspect that I'm also configuring my PWM sources incorrectly, maybe messing up the dead time... it's all a bit confusing.

You can find the schematic through the link below.

Thank you!

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[Link to off-site file on Google drive removed]

[Mod note:? Never point us to off-site storage.? Upload your schematic to this group's Files area.]
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On Fri, May 9, 2025 at 07:23 PM, <guilhermesouzam01@...> wrote:

My load is purely resistive, so in theory, the waveform I should see across the resistor will be square-shaped with the same RMS voltage as the supply voltage (Vcc) of the circuit.
However, when I simulate my circuit, the waveforms appear distorted and noisy.

Are you sure you looked at the voltage across the load resistor?? The easiest way to do that in LTspice is:
  • Position the cursor over one end of the resistor so that the probe turns red.
  • Press and hold the left mouse button.
  • Move the cursor to the other end of the resistor until the probe turns black.
  • Release the mouse button.
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Andy
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Hi, Andy. Thanks for it! I have not known this way. So easier...
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By the way, I've noticed the noises I commented before should be my PWM configuration, I'm not able to configure my PWM considering the dead time, so at the moment when one turns off and the other turns on, there's a distortion in my PWM. Is there a standard delay value to consider?


 

In addition, I just uploaded my LTspice file here on our group.
I don't know how I can send it to you but It called invmono_analise_tent2. If you are available, maybe you can take a look on my circuit and share your opinion with me... Thanks again!


 

Thank you for uploading the schematic.
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I don't know exactly what was the "distortion" you saw.? There are spikes on the waveforms at either end of the resistor.? Those spikes mostly disappear when you plot the differential voltage across the resistor.? By "distortion", did you mean the spikes?
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Those spikes mostly happen because of the capacitance internal to the MOSFETs.? The voltage waveform at each MOSFET's gate is a square-ish wave with fast (1 ns) edges.? That dv/dt (10 V/ns) couples through the gate-to-source or gate-to-drain capacitance to the output pins, nets N004 and N005, that are at either end of the load resistor.? If you zoom-in on just the rising edge of V(N004) (the waveform at the left end of R1), and also plot the gate voltage (V(N006)) at M2, you can see that the fast falling edge at the gate couples to the output pin, making it momentarily fall to -0.9 V.? Then it plateaus at around -0.4 V, for half a microsecond.? That is when M2 is switched OFF but M1 is not switched ON yet.? Neither FET actively drives during that nanosecond so the voltage floats at around -0.4 V because of the capacitance there.
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Half a microsecond later, M1 suddenly switches ON, and V(N004) suddenly rises to +5 V but it overshoots to +5.7 V because of the gate-to-source capacitance in M4.? Then it levels off at +5.0 V.
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I think there is dead time already in your gate drive signals when neither FET is ON, for about half a microsecond.
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The SPICE "PULSE" sources can be slightly challenging to figure out.? Yours are set up for:
  • 1ns when the voltage rises from 0V to 10V
  • 24.5us when the voltage sits at 10V
  • 1ns when the voltage falls from 10V to 0V
  • 50u-24.5u-1u-1u = 23.5us when the voltage sits at 0V
So it is not quite a "square" wave because it spends slightly more time at +10V than it does at 0V.? Most first-time SPICE users forget to take into account the rise and fall times.? The "on" time, Ton, is the time when the waveform is at 100%, not the time it is >50%.
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There is no "standard" delay time to use for dead time.? How much you need depends on the MOSFETs and exactly how they are driven.? Use trial-and-error to see what works best.
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In LTspice, it is best to add labels (netnames or nodenames) to every signal you might want to plot.? If you don't label a net, and plot it, and then change something in the circuit, the plotted netname might change to a different point in the circuit, and now it is plotting the wrong signal.? Adding your own labels avoids that.? But also remember that nets should have no more than one netname.
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Andy
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Hi Andy,

Thank you so much for your explanation. It was very helpful!

I just have one more question (I hope I¡¯m not bothering you): in our example, the power supply voltage is 5V. But what if our power supply is much higher, say around 300V? The MOSFET needs a gate-to-source voltage (Vgs) that is higher than the source (Vs) to turn on. So, if we keep using a 10V PWM signal referenced to ground, it wouldn¡¯t work properly.

I¡¯ve been researching this, and I came across the bootstrap driver technique. Is this commonly used in such high-voltage applications? Or is there another configuration we should use in this scenario?

Thanks again for your help!

By the way, do you have LinkedIn? I really appreciate your knowledge of LTspice. Congratulations!

Guilherme