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differimproved

 

I uploaded differimproved.zip in /temp. It is a simulation of a simple audio amplifier. Somewhat to my surprise my modifications didn't lead to the expected decrease in THD. Checks with another simulator (NGSPICE) shows that the THD does decrease. It also showed that LTSpice is about 3 to 6 times slower than NGSPICE for this problem. Of course this can't be true :-)


Does?anybody spot the problem?on this schematic? There must be "something one is not supposed to do" on it.


-marcel
 

Marcel wrote:

? ?"I uploaded differimproved.zip in /temp."

You forgot to include the models for the output transistors, QBD139 and QBD140.

It's generally not a good idea to refer to unnamed nodes (N007 and N008) in the plots, when you save the .PLT file for later use. ?I might not get the same nodes when I run it on my computer (though I probably will); and if I change anything in the schematic, those node names change.

How are you measuring the THD? ?This is a transient analysis, which makes me think you will do an FFT. ?If so, it is essential that you turn off waveform compression:

.options plotwinsize=0

This is quite possibly why your LTspice simulation has the distortion it has. ?Look at the bottom of the Help page for Waveform Viewer > Waveform Arithmetic, and note how the simulation there uses both plotwinsize=0 and numdgt=15, to get the best waveform accuracy for the FFT.

You also ought to have many waveform points per sine wave. ?Your simulation calls for a maximum timestep of 100us, which means only 10 samples per cycle. ?It might work OK with that, but I'd feel better with more samples per period.

Running your simulation with other output transistors, the amplifier does not seem to be very symmetrical and it is not biased right. ?Why does C5 have an initial condition of 7.5V ? ?I think that's wrong, given that the supply voltage is 7.5V and that C5's voltage ultimately needs to reach ~0V.

Also, why use UIC? ?You have this great simulator which can figure out the initial operating point for you; why not use it?

Regards,
Andy
 

Hi.
Your electronic scheme extremely unchancy. I have even said bad. The Modes of the second cascade are assigned resistor with nominal value 100kOhm. The Current aproximately is (Vcc-0.6V)/100K*Beta/2=(7.5-0.6)/100000*500/2=17.3mA (LTspice gave 15.6mA). At heating current will increase (since grows Beta).
Will In addition give change the current scatter parameter input cascade. So I do not advise to do the real amplifier on your scheme.

Bordodynov.
 

Thanks Bordodynov.


I do not intend to build this amplifier in its present state. I found its THD problem (compared to the asymmetric original) interesting, and hope that somebody can explain why?LTSpice's FFT shows unexpectedly bad results (and why it simulates so slowly).


-marcel
 

> You forgot to include the models for the output transistors, QBD139
> and QBD140.

Sorry, I'll fix that.

> It's generally not a good idea to refer to unnamed nodes
> (N007 and N008) in the plots, when you save the .PLT file

True. BTW, my idea is to look at the peak difference between the input and output signal. In my case it is about 500uVpp for 5Vtt output. It looks like 3rd order distortion.?I don't see how?this could ever translate to 1.8% THD.

> How are you measuring the THD? ?This is a transient analysis, which
> makes me think you will do an FFT. ?If so, it is essential that you turn
> off waveform compression:

> .options plotwinsize=0

> This is quite possibly why your LTspice simulation has the distortion
> it has. ?Look at the bottom of the Help page for Waveform Viewer >
> Waveform Arithmetic, and note how the simulation there uses both
> plotwinsize=0 and numdgt=15, to get the best waveform accuracy
> for the FFT.

Thank you. I tried this but it doesn't help at all.

> You also ought to have many waveform points per sine wave. ?
> Your simulation calls for a maximum timestep of 100us, which
> means only 10 samples per cycle. ?It might work OK with that,
> but I'd feel better with more samples per period.

You nailed it. This is no problem in my other simulator (which explicitly
interpolates the data before the FFT) but in LTSpice one apparently
must rely on oversampling for reliable results. With 1 us max. stepsize
I get very good?results (but it takes ages).

With 100 us steptime even the INPUT voltage (the sine generator)
has 1% THD :-)

> Running your simulation with other output transistors, the
> amplifier does not seem to be very symmetrical and it is
> not biased right. ?

It is ok for my BD139/140 models. I think 500 uV pp error is
quite good at 5Vpp output. Of course it would be fun to improve
that.

> Why does C5 have an initial condition
> of 7.5V ? ?I think that's wrong, given that the
> supply voltage is 7.5V and that C5's voltage
> ultimately needs to reach ~0V.

You are completely right. Simple brain fart on my part.

> Also, why use UIC? ?You have this great simulator which
> can figure out the initial operating point for you; why not use it?

I am not aware that LTSpice has a PSS algorithm?

Thank you for the expert advice, it really helped!

-marcel
 

Hello Marcel,

I have improved your simulation settings.

It's mostly not a good idea to use uic. One has to wait then that any bias capacitors reach it's steady state. uic should be only used as an exception if a simulation has convergence problems or one want to simulate the startup behavior. For the ladder case it's even better to ramp-up the supplies.

1. no uic

2. max time step 10u

3. .four set to 10 periods

The reported THD is now 0.175%.

Files > Temp >

Best regards,
Helmut
 

Thanks Helmut! The result appears to be correct now?and is?

of course much faster (10us step instead of 1us, 1s t_end

instead of 10s).


Is there a special reason to comment out "method=trap reltol=0.001",

other that they are the default for LTSpice (not the case in my other,

LTSpice file compatible, simulator)?


-marcel
 

Hello Marcel,

I only had commented it, because it's the default. I always have the defaults in the control settings of the SPICE tab. If you sometimes change the settings, then it makes sense to set it in the schematic.
?When one share a simulation to others it may be worth to mention that they should reset the SPICE settings in the Control Panel.

Best regards,
Helmut
 

Marcel wrote:

? ?"I am not aware that LTSpice has a PSS algorithm?"

What is a PSS algorithm?

Regards,
Andy
 

PSS == Pseudo Steady-State algorithm (e.g. http://www.mos-ak.org/sanfrancisco_2012/presentations/T05_Lannutti_MOS-AK_121212.pdf).?

A PSS is useful for power electronics circuitry (where the steady-state is a trajectory in state-space).


When the option UIC is *not* used,?SPICE?automatically finds an initial solution?at t=0. This?works (very) well for most analog (non-switching) circuits.?With UIC one can provide a hint for the steady-state. IMHO this should be faster in all non-trivial cases, but I notice that the experience of people in this forum is different.


A?brute-force PSS algorithm?simply runs a .tran until you detect that the state trajectories are converging. This convergence is actually?quite?tricky to detect, especially when there is feedback involved.


I hope this answers your question.


-marcel
 

Marcel wrote:

? ?"With UIC one can provide a hint for the steady-state."

Actually, with UIC, one does not provide a hint. ?One provides the entire steady-state operating point. ?SPICE bypasses finding the operating point and takes what you give it, as the operating point.

If you use IC= or .IC without UIC, then SPICE takes what you have provided as a hint, and continues from there to converge on a steady-state solution.

I find the reason most people use the UIC, is because of not understanding what SPICE does, or because they are simulating something like an oscillator, for which careful use of UIC can be beneficial. ?Otherwise, UIC should mostly not be used, and I don't understand why so many people seem to think that adding it is a useful thing to do.

Is PSS something that really helps analyze a DC coupled audio amplifier? ?Is there something wrong about SPICE's ordinary operating point analysis with respect to this amplifier?

Regards,
Andy
 

Hello,

>? Is there something wrong about SPICE's ordinary operating point analysis with respect to this amplifier?

Using "uic" in an amplifier having any capacitor is a very bad idea. One waste a long simulated time until the steady state operating point will be reached to the last milli-Volt.

Best regards,
Helmut
 

? ?"Using "uic" in an amplifier having any capacitor is a very bad idea. One waste a long simulated time until the steady state operating point will be reached to the last milli-Volt."

I wholeheartedly agree!

The simulation in the original circuit ran for 10 seconds of simulated time. ?I ran it for >30 seconds, and some of the waveforms were still significantly changing even without having to zoom in to the millivolt level. ?Because the bias points were still shifting, and some of the intermediate signals are low-level, it was having a huge effect on the output.

Removing UIC fixed that.

Andy

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