Thanks Helmut! The result appears to be correct now?and is?
of course much faster (10us step instead of 1us, 1s t_end
instead of 10s).
Is there a special reason to comment out "method=trap reltol=0.001",
other that they are the default for LTSpice (not the case in my other,
LTSpice file compatible, simulator)?
-marcel
