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I am trying to work with the CD4000_v.lib and am getting errors when trying to run. Would someone provide me some guidance as to what is set up in error?
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File uploaded to temp: CD_test.zip
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This is using the CD4013 as a counter. I have included the latest CD4000_v.lib and the CD4013B symbol from the files section to make it easy.
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On Tue, Apr 1, 2025 at 08:34 PM, DerekK wrote:
I am trying to work with the CD4000_v.lib and am getting errors when trying to run. Would someone provide me some guidance as to what is set up in error?
The error I get is:
Fatal Error: Could not open library file "CD4000.LIB"
That happens because the symbol cd4013b.asy attempts to load the library file CD4000.lib, whereas your simulation only has CD4000_v.lib.
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Where exactly did that symbol file come from?? Did you download it from the same location (in our group's files) where the library files are?
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Andy
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Here is your problem.? You either obtained a bad copy of your symbol file CD4013B.asy, or you (or someone in your group) modified it, and that's causing that error.
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Download this file:?
Files > z_yahoo > Lib > Digital CD4000 > CD4000.zip
then either unzip it, or pull out just the one file (CD4013B.asy) that you need.? Use that instead of the symbol file you were using.? Depending on where you put your files, you might need to overwrite or delete the old file.
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You might also need to delete the symbols from your schematic (Draft2.asc) and then add them back again.? There are some Attributes that are "sticky" and remain in the schematic even if the attribute in the symbol changes.? Deleting and re-adding the symbol takes care of that.
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If this does not fix the problem, then ask again.? Your message said "errors" (plural) but did not say what they were.? So I am left wondering what error or errors you had.
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Andy
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Andy,
I updated the symbol from the suggested source. Deleted the old symbol and placed the new one. Restarted LTSpice. Still getting errors. I re-uploaded the CD_test.zip file. This time I included the log file which shows the error.
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You uploaded the .LIB file twice, instead of
the .LOG file, but there was no need anyway, we can run the sim
to get the .LOG file. The sim runs OK (but does it do what you
want? It seems to be a short time sim.), and those Warnings in
the .LOG can be disregarded: the nodes probably connect to
current sources, which have infinite impedance, so don't
register as connected.
On 2025-04-02 15:31, DerekK wrote:
Andy,
I updated the symbol from the suggested source. Deleted the
old symbol and placed the new one. Restarted LTSpice. Still
getting errors. I re-uploaded the CD_test.zip file. This time I
included the log file which shows the error.
--
OOO - Own Opinions only
If something is true:
* as far as we know - it's science
*for certain - it's mathematics
*unquestionably - it's religion
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At the end of the log file I get the following and cannot probe the circuit. I know it is a short run-time circuit. It is a portion of a larger one, and I have not played with the digital stuff before.
----------------------------
C:\Users\derek\Desktop\New folder\cd4000_v.lib(91): syntax error
.param td1=1e-9*(400-40-10)*5.0/(vdd1}*{speed1} ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?^^^^^^^^^^ C:\Users\derek\Desktop\New folder\cd4000_v.lib(92): Expected ")" here. .param td2=1e-9*(250-40-10)*5.0/(vdd1}*{speed1} ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?^^^^^^^^^^ C:\Users\derek\Desktop\New folder\cd4000_v.lib(92): syntax error .param td2=1e-9*(250-40-10)*5.0/(vdd1}*{speed1} ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?^^^^^^^^^^ C:\Users\derek\Desktop\New folder\cd4000_v.lib(93): Expected ")" here. .param td4=1e-9*(130-40-10)*5.0/(vdd1}*{speed1} ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?^^^^^^^^^^ C:\Users\derek\Desktop\New folder\cd4000_v.lib(93): syntax error .param td4=1e-9*(130-40-10)*5.0/(vdd1}*{speed1} ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?^^^^^^^^^^
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Found it!!! It actually was an error in the .lib file. There are a few instances of "(vdd1" which should have a different bracket: "{vdd1". Now it runs. And this was from the recent download suggested.
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Derek,
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Those errors depend on which version of LTspice you are using.
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On older versions, there are no errors in the Error Log file.? It simulates "correctly" and produces the right waveforms - though you really need for the simulation time to be longer to see more action.? There are several status messages and a few warnings, but none of them are errors.
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The error messages that you saw are the result of using the latest LTspice versions (v24.1.*) which are quite a bit more picky about syntax, than all prior versions were.? This might be considered one case where having the newest LTspice version is not to your advantage - although that is debatable.? In fact, there probably were mistakes in the library file, which had gone undetected for several years.
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Andy
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On 02/04/2025 17:47, DerekK wrote:
Found it!!! It
actually was an error in the .lib file. There are a few instances
of "(vdd1" which should have a different bracket: "{vdd1". Now it
runs. And this was from the recent download suggested.
This precise error came up here recently.The fact that you got an
error shows you must be running LTspice V24.1.x. This "error" has
been in the library since the beginning, but previous versions of
LTspice didn't flag it and allowed it to proceed.
eetech00 uploaded a fixed library that you presumably didn't find: CD4000_v(65a).lib
on Feb 21 2025.
--
Regards,
Tony
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OK, found the proper lib as well. Had to sort by date. We should get rid of the old stuff so that others do not download items in error.
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As for the circuit, I played some more but cannot get the output of the CD4013B to change. Both Q and Q* are staying at zero on the first stage when I am running a clock on the input. I even played with changing values of SET and RST with no change in the output. Something should be moving.
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Uploaded as CD_test.v3.zip. I have the .lib, .asy, .asc and .plt file included.
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On Wed, Apr 2, 2025 at 12:38 PM, DerekK wrote:
As for the circuit, I played some more but cannot get the output of the CD4013B to change. Both Q and Q* are staying at zero on the first stage when I am running a clock on the input. I even played with changing values of SET and RST with no change in the output. Something should be moving.
Your voltage source V2 drives node VDD1.? ?That? should be node VDD.? ?These CD4000 models require a power node named "VDD".
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Andy
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Also, the parameter name in the top-level schematic should be "VDD", not "VDD1".? And the parameter "Speed1" on the top-level schematic should have been named "Speed", but it was set to the default value anyway so it would not have done anything.
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I don't know how that was changed, or why you changed it.? If I remember correctly, those CD4000 models use names such as "VDD1" internally, but the top-level names must be without the "1" added.? The library file passes the value from VDD to VDD1.
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Andy
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Derek,
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I am curious whether there is a purpose to the 0.001 uF capacitor (C1) on the Q output of the last CD4013, U4?
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Also, I assume you know node RST is floating, in the simulations you uploaded.
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Andy
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It was the VDD1 that was the final issue. Now things are moving correctly. Thanks all for the support.
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Those messages are not significant LTspice
error messages. They are probably due to over-keen syntax checks
that were introduced in some 24.1.x versions of LTspice. I don't
see them in my .LOG file, which is not a surprise, because they
include a path that only exists on your computer. Which version
of LTspice are you using?
I can't see why you can't probe the circuit,
of course, but you can't probe pins that have no wire attached.
Can you plot the voltage on the wire connected to Qbar of U2,
for example?
On 2025-04-02 16:20, DerekK wrote:
At the end of the log file I get the following and cannot
probe the circuit. I know it is a short run-time circuit. It is
a portion of a larger one, and I have not played with the
digital stuff before.
----------------------------
T:\Other drawings\XM27 gun\41897800 Elec Sys Assy\41897801
Ctl Box\41897802 Control box\41897817 K3 Relay
assy\A154\simulation\cd4000_v.lib(91): syntax error
.param td1=1e-9*(400-40-10)*5.0/(vdd1}*{speed1}
? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?^^^^^^^^^^
T:\Other drawings\XM27 gun\41897800 Elec Sys Assy\41897801 Ctl
Box\41897802 Control box\41897817 K3 Relay
assy\A154\simulation\cd4000_v.lib(92): Expected ")" here.
.param td2=1e-9*(250-40-10)*5.0/(vdd1}*{speed1}
? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?^^^^^^^^^^
T:\Other drawings\XM27 gun\41897800 Elec Sys Assy\41897801 Ctl
Box\41897802 Control box\41897817 K3 Relay
assy\A154\simulation\cd4000_v.lib(92): syntax error
.param td2=1e-9*(250-40-10)*5.0/(vdd1}*{speed1}
? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?^^^^^^^^^^
T:\Other drawings\XM27 gun\41897800 Elec Sys Assy\41897801 Ctl
Box\41897802 Control box\41897817 K3 Relay
assy\A154\simulation\cd4000_v.lib(93): Expected ")" here.
.param td4=1e-9*(130-40-10)*5.0/(vdd1}*{speed1}
? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?^^^^^^^^^^
T:\Other drawings\XM27 gun\41897800 Elec Sys Assy\41897801 Ctl
Box\41897802 Control box\41897817 K3 Relay
assy\A154\simulation\cd4000_v.lib(93): syntax error
.param td4=1e-9*(130-40-10)*5.0/(vdd1}*{speed1}
? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?^^^^^^^^^^
--
OOO - Own Opinions only
If something is true:
* as far as we know - it's science
*for certain - it's mathematics
*unquestionably - it's religion
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Gentlemen, those CD4x and 74HC libraries have two required values that appear on a symbol's SpiceModel line.
ctrl-right-click a logic symbol to alter its SpiceModel line.
By default the two values are the nodes "VDD" and "0".
Creating a 12V power supply for CD4x logic and naming its output node VDD works out-of-the-box.
But assume for example, you already have a V-24 node and a V-12 node that could power the logic.
Change the logic symbol's default SpiceModel value from "VDD 0" to "V-12 V-24".
This sets logic outputs to be V(V-12)=logic-high and V(V-24)=logic-low, instead of VDD/0.
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In either case the difference across the power pins is 12 volts, -12 to -24 volts or 12 to 0 volts has the same 12 volt difference.
To power the internal logic from 12 volts, change the symbol's default SpiceLine (not SpiceModel) value from VDD=5 to VDD=12.
The SpiceLine VDD=x value sets the model's power-pin voltage and can be anything like VDD=2.3 or 3.5, 6, 12 etc...
The three SpiceLine values control functions within the logic like, prop-delay, output drive, slew rate, etc...
The SpiceLine SPEED=1.0 and TRIPDT=5e-9 are defaulted for the logic family.
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Changing the VDD=x value affects the speed of a given device. (i.e. CD4x is much faster at 15V than it is at 5V)
The SpiceLine SPEED=1.0 value is relative.
To model CD4x-like logic at 12 volts that is 10 times faster than normal CD4x logic, change the SpiceLine SPEED=1.0 value to SPEED=10.
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Sent:?Wednesday, April 02, 2025 at 12:52 PM
From:?"Andy I via groups.io" <AI.egrps+io@...>
To:[email protected]
Subject:?Re: [LTspice] CD4000 test
On Wed, Apr 2, 2025 at 12:38 PM, DerekK wrote:
As for the circuit, I played some more but cannot get the output of the CD4013B to change. Both Q and Q* are staying at zero on the first stage when I am running a clock on the input. I even played with changing values of SET and RST with no change in the output. Something should be moving.
Your voltage source V2 drives node VDD1.? ?That? should be node VDD.? ?These CD4000 models require a power node named "VDD".
?
Andy
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On 03/04/2025 09:55, eewiz via
groups.io wrote:
Gentlemen, those CD4x and 74HC libraries have two required
values that appear on a symbol's SpiceModel line.
ctrl-right-click a logic symbol to alter its SpiceModel line.
By default the two values are the nodes "VDD" and "0".
Creating a 12V power supply for CD4x logic and naming its
output node VDD works out-of-the-box.
But assume for example, you already have a V-24 node and a
V-12 node that could power the logic.
Change the logic symbol's default SpiceModel value from "VDD
0" to "V-12 V-24".
This sets logic outputs to be V(V-12)=logic-high and
V(V-24)=logic-low, instead of VDD/0.
?
In either case the difference across the power pins is 12
volts, -12 to -24 volts or 12 to 0 volts has the same 12 volt
difference.
To power the internal logic from 12 volts, change the
symbol's default SpiceLine (not SpiceModel) value from VDD=5 to
VDD=12.
The SpiceLine VDD=x value sets the model's power-pin voltage
and can be anything like VDD=2.3 or 3.5, 6, 12 etc...
The three SpiceLine values control functions within the logic
like, prop-delay, output drive, slew rate, etc...
The SpiceLine SPEED=1.0 and TRIPDT=5e-9 are defaulted for the
logic family.
?
Changing the VDD=x value affects the speed of a given device.
(i.e. CD4x is much faster at 15V than it is at 5V)
The SpiceLine SPEED=1.0 value is relative.
To model CD4x-like logic at 12 volts that is 10 times faster
than normal CD4x logic, change the SpiceLine SPEED=1.0 value to
SPEED=10.
This is not quite correct. The CD4000 parts do have the internal
"VDD" supply node, but in the 74HC parts, it is "VCC".
--
Regards,
Tony
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DerekK
John Woodgate
Tony Casey
eewiz