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Is there an easy way to convert subciruits to schematics? (I.e., a sub2asc converter)
rainbowsally
I love the scematics (especially analogspiceman's.. :-) they are beautiful. I can even read my own!
But I'd like to literally see how some of these subcircuits are modeled so I can see why things behave as they do. For example I got TLC555 which I believe is a CMOS 555 timer (and they're cheap and giving 'em away right now), but when I measure the input currents they are identical to the old NE555 model we have in our lib folders somewhere. So what I'm asking is this. How do I get a visual representation of the components MINUS the *.asy file. And I don't care how many steps it might take. Might even write a converter program if there isn't a way to do this inside ltspice. Drawing them component by component is on my don't-do list. :-) |
So what I'm asking is this. How do I get a visual representation of theIt is not done by LTspice. (LTspice needs no schematic representation of what a circuit or subcircuit looks like ... the SPICE netlist has everything it needs.) It is NOT trivial to convert a netlist of one form or another, into a human-readable schematic. The question has been asked here a few times before. Some research has been done, and some of the previous discussions touched on some of that research and a few other programs that offer such capability. Try searching through the group's archives for those earlier message threads. Many IC models are macro-models and contain functional equivalents for whole blocks of circuitry. Some IC macro-models don't even contain a single transistor! And that can give rise to various problems. Depending on what you are looking for, a full schematic may not be needed. It might be possible to trace out everything connected to the input pin in question, and get a better handle on why it behaves the way it does. Note: it may not be pretty what you discover about the subcircuit; many subcircuits are poorly constructed and/or used improperly! Andy (PS: I'll bet that some of us SPICE oldtimers got to be pretty good at turning SPICE netlists into hand-drawn schematics, for those times when we really needed to know what a circuit looks like.) |
rainbowsally
Andy wrote:
Yes, but not everything *I* need.So what I'm asking is this. How do I get a visual representation of theIt is not done by LTspice. (LTspice needs no schematic representation It is NOT trivial to convert a netlist of one form or another, into aNot talking about a netlist.... I don't think. (???) Talking bout a literal *.asy file which should have all the info in it necessary to make some kind of representation of as a schematic -- even if it's an IC block with 100 pins all on one side. the sym file can be modified. The question has been asked here a few times before. Some researchOuch. Many IC models are macro-models and contain functional equivalents forNope. Not a problem. Those can be replaced by actual transistors once the connections are identified. Depending on what you are looking for, a full schematic may not beIf I could see before/after shots of a couple of them I'd have something to start with. As it is, I'm just getting up to speed on the "heirarchy" file.asc (top) |-- file.asy (schematic) `-- top.sub (external assembly of .model's) Currently wobbly but ok with *.asy, and completely flummoxed by *.sub. which I'd like to be able to convert to/from. Thanks for the reply Andy! :-) And no... not going to search old message in this forum. Yow! Having enough probs identifying a small realistic set of good cheap transistors, especially for driver and power output for an audio amp. |
I wrote:
rainbowsally wrote:It is NOT trivial to convert a netlist of one form or another, into a Not talking about a netlist.... I don't think. (???)There are all kinds of netlists. A netlist is generically just a file that has all the information about connectivity of your circuit. Most people who inquire about converting a SPICE model to a schematic, are starting with a subcircuit, which IS a SPICE netlist. It is a text file that lists all the components as well as how they are interconnected. I thought that was what you were starting with. By the way, the *.asy file is just the symbol you see on your schematic. It itself has NONE of the information about the schematic it represents. I think you misunderstood. The macro-model contains FAKE elementsMany IC models are macro-models and contain functional equivalents forNope. Not a problem. Those can be replaced by actual transistors once that stand in for whole sections of transistors and stuff. Say you've got an IC op-amp. Someone can replace the whole op-amp with a VCVS, which is just an E-element in SPICE. Doing so loses all of the components that made up that IC! You would not be able to come along later and restore the actual transistors to the schematic, unless you (somehow) also had a schematic in your other hand for the insides of the IC op-amp that was used. So I'm saying the SPICE model you have for (say) that TLC555 you have, *might* not even have any transistors in it! It might be just a functional equivalent of a generic '555. (Hopefully not!) And making use of these macro-models, can create problems (these are the "problems" I alluded to before). A simple VCVS used as a macro-model does not clip. A real op-amp does. And no... not going to search old message in this forum. Yow!Well then you are missing out on a TON of useful information! This group has a decade's worth of experience in them thar' archives. If your approach is to say, "Give me the answers now, I don't want to see the answer to the same question you wrote last (week, year, whatever)", then I'm not so sure I'd want to help. Hopefully you will reconsider. Do you ever use the Internet? Google? Wikipedia? So if you are willing to find an answer to something on the Internet that was written two years ago, why won't you do the same here in this forum? Good luck with your project. Andy |
Ray Merewether
The netlist for a subcircuit is essentially a "directed graph" (not a Cartesian graph, nor radial graph like you drew in high school) See the "tutorial/GraphDrawing" in the Mathematica help.
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Mathematica has plotting tools for "graphs" and "directed graphs". Any edge and any vertex can be given a name. Beyond that, Mathematica has built in the ability to use any Mathematica object for a node label or edge label (or more generally for any legend entry, plot point, etc.) and such functionality can be nested arbitrarily deep. There are 7 precanned "Methods" for organizing the drawing. None of these are likely to pretty like analogspiceman pretty, but if you got lucky, one of the methods might provide an aha! perspective. The most obvious problem is that a human wants to see functionally related nodes clumped together and the functional information is generally not available in the LTSpice netlist. Using BFI, you could look at your first attempt, and decide that it would be smart to assign each connection to node zero in the LTSpice subcircuit netlist to a separate vertex in the output graph and use a little image of a ground symbol for each of those vertices. Similarly for each node YOU judge to be worthy of being given a netlist name as opposed to a netlist number. To fully automate the process you'd probably want to use LISP or Prolog and plan on spending the rest of your life writing code to run on a cluster. -----Original Message-----
From: LTspice@... [mailto:LTspice@...] On Behalf Of rainbowsally Sent: Wednesday, August 29, 2012 12:39 PM To: LTspice@... Subject: [LTspice] Is there an easy way to convert subciruits to schematics? (I.e., a sub2asc converter) I love the scematics (especially analogspiceman's.. :-) they are beautiful. I can even read my own! But I'd like to literally see how some of these subcircuits are modeled so I can see why things behave as they do. For example I got TLC555 which I believe is a CMOS 555 timer (and they're cheap and giving 'em away right now), but when I measure the input currents they are identical to the old NE555 model we have in our lib folders somewhere. So what I'm asking is this. How do I get a visual representation of the components MINUS the *.asy file. And I don't care how many steps it might take. Might even write a converter program if there isn't a way to do this inside ltspice. Drawing them component by component is on my don't-do list. :-) ------------------------------------ Yahoo! Groups Links |
--- In LTspice@..., rainbowsally <rainbowsally@...> wrote:
Over MANY years I've tried lots of netlist to Schematic conversion programs. To be honest none of them work well for Analog circuits. For digital schematics the best I ever saw was from a company called Veiwlogic, but this company has long since faded from the scene. Many professional IC design packages include netlist to Schematic conversion because it is sometimes needed when you are debugging digital Logic that was auto generated from Verilog code. Unfortunately the tool you are searching for does not exist, so save yourself time searching and learn to read Spice netlists and draw the schematic by hand, then reenter it into LTspice and compare the schematic's netlist with the original netlist. There are automatic tools for comparing netlists, typically I'd use the Layout Vs Schematic (LVS) comparison tool BUT enter two netlists instead of a Layout and schematic. -Robert |
rainbowsally
Andy wrote:
<snip> Understood. But they can be recreated using discretes. This truly isn't a problem.Nope. Not a problem. Those can be replaced by actual transistors onceI think you misunderstood. The macro-model contains FAKE elements <snip> And making use of these macro-models, can create problems (these arePrecisely. :-) But there aren't many models or even internal schematics on the internet. So I thought I'd start... and after I did one xx339 comparator with some degree of success (from an image of the schematic). Someone around here did the entire NE555 chip and that has been extremely useful to me. I'd like to do the same with a few opamps and stuff. I'm not a very good reader. I can parse a schematic MUCH better than I can parse words, but if you give me some realistic search terms, I'd give it a whirl.And no... not going to search old message in this forum. Yow!Well then you are missing out on a TON of useful information! This I don't think I'd want to wade through all the results for "subcircuit", for example because as you say, in "ten years" most of the hits are going to be non-useful and I have dialup which is prohibitively slow for this kind of thing even using Ctrl-F to locate possible hits. But never mind, Andy. I'll figure it out myself eventually. I was just hoping there was an easier way. If your approach is to say, "Give me the answers now, I don't want to Currently spending all "searching" time using datasheetcatalogs.com to find data sheets and manufacturers that I like and mouser.com to look up the same parts to get pricing. Took several hours to find some good prospects for the power output stage for kevin's amp (4th hack with realistic parts). I don't have time. But I'm willing to share the methods and results with everyone here. Hope that's not a problem. ;-) Do you ever use the Internet? Google? Wikipedia? So if you areIt's not my project. It's Kevin's. And it's Gandolf's. And it's going to blow the doors off and come in at 1/4th the price of a cookbook solution. |
rainbowsally
Ok, I see where I have to get to next.
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Thank you. RobertTalty wrote:
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I wrote:
rainbowsally replied:I think you misunderstood. The macro-model contains FAKE elements Understood. But they can be recreated using discretes. This trulyI hope I am neither offending, nor coming off sounding like a jerk ... but I am still not sure you understand. Let's say someone hands you a SPICE model for an IC, part number XYZ, which you want to use in your circuit, and simulate in LTspice. But being the curious type, you need to know what is in that model. You want to see it visually in schematic form. So you spring for that $100K conversion program which converts it into a schematic. And, voila, it spits out a schematic consisting of: a couple of voltage sources, a few resistors and capacitors, and a behavioral controlled source described by an equation. Not a transistor in sight! In other words, it is one of those dreaded "macro-models" that represents the behavior (rather than the structure) of the XYZ part. Sure, you could replace it or recreate it using discretes ... if you knew what discretes to use! But you don't. All you have is the macro-model. You know nothing else about the insides of this XYZ part. For that TLC555 that started this discussion, if the SPICE model you have is one of these macro-models, then you might have no way to understand why the input current is the same as it was for an old NE555, even though the TLC555 is supposed to be a CMOS part. Furthermore, it truly is a problem when the macro-model does not accurately represent a certain behavior of the device that matters to you. And that can easily happen. Andy |
But there aren't many models or even internal schematics on theOn the contrary, there are thousands upon thousands of SPICE models on the Internet! Part of the difficulty is determining which ones are worthy of using and which ones are not. For a popular IC component like a 741 or a 555, you could probably find literally hundreds if not thousands of copies of SPICE models for them on the 'net, of which a few dozen are distinct from one another; and then your job is to choose which one(s) to run with. Internal schematics, now there you may be correct that they are hard to find on the Internet. It used to be (when an op-amp was about as complex an IC as you could get) that equivalent schematics were often included on the data sheet for the part. Of course the schematic didn't show you the characteristics of the transistors and diodes, and maybe omitted resistor values too, but at least it was a starting point. And I have seen and used a number of vendor-supplied SPICE models that included schematics in the documentation that accompanied those models. Regards, Andy |
Getting back to the original question again ... (Is there a tool to
convert a SPICE model to a schematic?) ... Two data points so far are: - It might cost you $100K. and - None of them work well for Analog circuits. I'd like to suggest that it might not be quite as bad as this. I believe there are cheaper alternatives available. I ran across one a while back (costing only around a thousand bucks?) that claims to be able to do it. I am also led to believe that some academic research work *might* be available for free, if you know where to find it. As for quality, let's just say "your mileage may vary." Might be acceptable, might be horrible, depending on the quality of the program, and on the circuit you feed into it. So I don't want to give you unrealistic hope ... but I also don't want you to be so discouraged to believe that it is impossible either. As I said earlier, converting to a schematic is NOT a trivial problem. So far, this is one of those tasks that the human brain is much better than a computer at doing well. Regards, Andy |
--- In LTspice@..., Andy <Andrew.Ingraham@...> wrote:
Re: Netlist to LTspice schematic As far as I know LTspice does not support a schematics to schematics conversion program, SO even if you love the schematics that you get by netlist conversion with whatever tool, you will not be able to move these schematics into LTspice automatically. There is a common Electronics Design tool Interchange Format called (EDIF) which will allow EDIF to be used as an intermediate format however I've never heard of an EDIF=>LTspice schematics. I believe that the schematics tool on which LTspice schematics is based is now part of the "Laker" design tools package, unfortunately it underwent a major rewrite some years back so it is probably no longer compatible with LTspice (I know one of the changes was to make the schematic .asc file into a binary format). BTW EDIF transfer hardly ever works properly because each schematic system has it's own quirks and preference for symbol size / drawing grid etc. not to mention funny constructs such as component loops (as supported in LTspice). These funny constructs do not have generic EDIF equivalents, so we re-enter by hand! PPS: It is not by accident that no two design entry tools are really completely inter-operable. The big players like the tool Lock-In they get with incompatibility. Just to show you how cynical the industry is many tool vendors support and EDIF reader but hardly any supply an EDIF writer. |
I think the main problem is that in a subcircuit, the connecting lines and layout of an equivalent schematic are basically missing.
So only way I know of is to go through the subcircuit line by line, and laboriously create the schematic drawing of that in LTspice schematic editor 'by hand'. The nodes (connecting lines) will have numbers in the subckt which can also be named the same on the drawing which does help. Unless anyone knows differently :D |
--- In LTspice@..., rainbowsally wrote:
I love the schematics (especially analogspiceman's.. :-) TheyThanks for the kind remark. :) :) Like my posts, I *do* try to make my schematics sensibly organized and easy to read (but sometimes I fear I forget to mention that I have decreased the default font size). Understanding electronics is already difficult enough without having to look at a messy, jumbled schematic. But I'd like to literally see how some of these subcircuits areUh-oh, then I'm afraid you may be in for a disappointment. Here is what I do, but it is very laborious (so it's worth the trouble only if the netlist is very interesting). Before you start, make working copy of the netlist and then clean it up by doing any reordering of lines or shortening of node/net names that will make them easier to work with. For example, nets with names like "n023" and "n001" can usually be safely shortened to "n23" and "n1" (sometimes I do this in a word processor with find and replace). Also, it is a good idea to move all comments to the end of the working netlist (if not delete them altogether). At this point, I like to import the netlist into LTspice, either directly onto the schematic (if the netlist is short) or into a separate LTspice netlist window. (Did you know that LTspice has its own netlist viewer that displays text in context aware color?) Now go through the netlist line by line and place a component of the corresponding type on the schematic (arrange these in rows by component type such that you build up rows of all the same type). It is important to do this in exactly the same order as the net- list because this will greatly ease cross checking when you think you have finished. (Also, all of the SPICE text, such as model statements, etc. should be copied and pasted in at the end.) As you place each component, edit its reference designator to agree with the corresponding netlist reference designator. As you place each component, place a net-label/node-name directly on each pin of the component (of course, these should agree with their names in the netlist, too). Don't bother with wires yet as these will just be trouble to move around later. Once all the components are placed, view the SPICE Netlist (it's a drop-down menu item) and verify that it agrees *exactly* with the original netlist (it will, if you followed these instructions carefully). Correct any errors as needed until agreement is perfect. This "schematic" should actually be able to run at this point. So far you have just been playing the part of a robot, but now comes the fun part where human judgement is required. Move the components around on the schematic to group them such that the pins that have the same net names are close to each other and that signal flow makes sense. Use the Highlight Net tool (right mouse button click on a pin or net) to make sure no connection is overlooked. Only when the parts are reasonably well placed is it time to start drawing in the wires and adjust the look of the schematic. Be sure to check occasionally that the two netlists continue to match. Because both netlists and schematics are just ascii text files, the first part of this process should be fairly straightforward to automate in software. Grouping components and connecting them for least total wire length might be harder, but still possible (I would try an approach using the so-called "synthetic annealing" algorithm). However, finishing the schematic to human sensibilities would seem beyond the reach of any canned program, but having a utility that did the first two steps would be a big time saver and well worthwhile. -- a.s. PS: If you wish to write your own code to do this perhaps it would help to look at this very similar open source program (unfortunately it does not produce LTspice schematics). |
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