Keyboard Shortcuts
Likes
- LTspice
- Messages
Search
Re: Single-phase H-bridge inverter circuit
Thank you for uploading the schematic.
?
I don't know exactly what was the "distortion" you saw.? There are spikes on the waveforms at either end of the resistor.? Those spikes mostly disappear when you plot the differential voltage across the resistor.? By "distortion", did you mean the spikes?
?
Those spikes mostly happen because of the capacitance internal to the MOSFETs.? The voltage waveform at each MOSFET's gate is a square-ish wave with fast (1 ns) edges.? That dv/dt (10 V/ns) couples through the gate-to-source or gate-to-drain capacitance to the output pins, nets N004 and N005, that are at either end of the load resistor.? If you zoom-in on just the rising edge of V(N004) (the waveform at the left end of R1), and also plot the gate voltage (V(N006)) at M2, you can see that the fast falling edge at the gate couples to the output pin, making it momentarily fall to -0.9 V.? Then it plateaus at around -0.4 V, for half a microsecond.? That is when M2 is switched OFF but M1 is not switched ON yet.? Neither FET actively drives during that nanosecond so the voltage floats at around -0.4 V because of the capacitance there.
?
Half a microsecond later, M1 suddenly switches ON, and V(N004) suddenly rises to +5 V but it overshoots to +5.7 V because of the gate-to-source capacitance in M4.? Then it levels off at +5.0 V.
?
I think there is dead time already in your gate drive signals when neither FET is ON, for about half a microsecond.
?
The SPICE "PULSE" sources can be slightly challenging to figure out.? Yours are set up for:
So it is not quite a "square" wave because it spends slightly more time at +10V than it does at 0V.? Most first-time SPICE users forget to take into account the rise and fall times.? The "on" time, Ton, is the time when the waveform is at 100%, not the time it is >50%.
?
There is no "standard" delay time to use for dead time.? How much you need depends on the MOSFETs and exactly how they are driven.? Use trial-and-error to see what works best.
?
In LTspice, it is best to add labels (netnames or nodenames) to every signal you might want to plot.? If you don't label a net, and plot it, and then change something in the circuit, the plotted netname might change to a different point in the circuit, and now it is plotting the wrong signal.? Adding your own labels avoids that.? But also remember that nets should have no more than one netname.
?
Andy
? |
Re: IP3 or 3rd Order Intercept Point Plotting
¿ªÔÆÌåÓýYou should search the group archives yourself
first. Those are the files with 'z-xxx' names on the Files web
page. Also, look in the Examples that come with the app, and the
Wiki. On 2025-05-10 14:16, Dan via groups.io
wrote:
--
Best wishes John Woodgate RAYLEIGH Essex OOO-Own Opinions Only If something is true: * as far as we know - it's science *for certain - it's mathematics *unquestionably - it's religion |
Re: Latest syntax checking improvement and related issues
¿ªÔÆÌåÓýOn 10/05/2025 13:34, igor-m via
groups.io wrote:
The devs would probably argue that your libraries haven't been corrupted, but always failed "correct" syntax previously. Anyhow, this has already been discussed here at length, and there has been a flurry of new updates to the 24.1 branch as a result. If you don't want to go through "fixing" all your "broken" libraries in the meantime, you could downgrade to V24.0.12. This is not on ADI's website, but a verified "Wayback" link to it has been published on here recently. --
Regards, Tony |
Re: Access .model parameters by name in expressions
¿ªÔÆÌåÓýOn 10/05/2025 11:43, andrewsimper via
groups.io wrote:
Inside each .model there will definitely be default values stored somewhere, which could be returned if one is not provided explicitly in the .model statement, so I don't see why this couldn't be done. LTSpice is great for how it handles arbitrary expressions and behavioural devices, so I'm sure it would be possible to do such a thing if the developers wanted to.Many things are possible. Default parameter values for LTspice, at least, are listed in the Help, so you could create your own default intrinsic models if you wished - put them into the standard.xxx libraries. I think LTspice uses the last same-named model it encounters. In any event, I petty sure they cannot be accessed programmatically internally, although it would straightforward to do externally. Unfortunately, LTspice cannot invoke arbitrary external code. Many years ago, long before its acquisition by ADI, LTspice had features that were used internally by LTC, but not documented or even acknowledged. Some were completely removed after being "discovered", or at least hidden more deeply, similar to the binary format of proprietary models that are supplied, but cannot be read. You need to remember that LTspice is proprietary software. If you want a SPICE that you can customise, Ngspice is open source - you could add features of your own to your heart's content. Similarly, the original SPICE code from Berkeley is public domain and freely available - an "up to date" buildable version for Linux can be found here: I've no doubt it could be done in LTspice, but unless it's facilitated by one of the other ongoing enhancements to V24.1.x, good luck wishing for it. AFAIK, no one has ever requested it. At least for now, you're stuck with a workaround. -- Regards, Tony |
Latest syntax checking improvement and related issues
I am not sure whether some of my libs got corrupted, but with the latest LTspice release and its stronger syntax check ie. the Bordodynov lib shoots huge number of errors which must be corrected otherwise the simulation does not start.
Usually errors are with TABLE syntax, but with typos as well (well, quite huge amount).
Any experience with that here? |
Re: Access .model parameters by name in expressions
Inside each .model there will definitely be default values stored somewhere, which could be returned if one is not provided explicitly in the .model statement, so I don't see why this couldn't be done. LTSpice is great for how it handles arbitrary expressions and behavioural devices, so I'm sure it would be possible to do such a thing if the developers wanted to. |
Re: Dual Active bridge
Thank you so much for taking the time to help me. I truly appreciate it.? ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- 1. The ADuM3190-chip was used to regulate the DAB-Converter. Open the datasheet to see what is inside the chip. This chip is operating much more linear, compared to other regulator configurations, such as the combination of "voltage reference, together with an OP-Amp + Optocoupler". The optocoupler is known for it's nonlinearities and therefore more complicated to stabilize the converter. ? ?? ?I just used the ADuM3190-chip to show an alternative solution. Its use is not mandatory, you don't need it. ???????? It is assumed you want to use the Transformer for isolation purposes, right? In that case the regulation feedback loop needs to have an isolation as well. Another alternative, for which an isolated regulation loop can be omitted, is the use of an isolated transformer-coupled Driver. In that case you will have the freedom to put the regulation circuitry to any ground point - output Ground for instance - without the need for an isolated feedback loop. The isolated Driver provides a floating Ground. So, the regulator inside the UC3875 could be directly used for regulation.? ? 2. The UC3875 gate driver outputs A,B and C,D can drive a transformer coupled driver or a Low side/-High side driver instead. For simplicity, I used voltage-dependent-voltage sources, which LTspice offers in its library as "e-sources". The switching frequency is accomplished by the R12,C8, connected to the FREQSET-Pin of the UC3875. For more information, pls refer to the datasheet, in which you find a curve for Rt=f(CT, frequency). ? 3. The transformer(s) have nothing to do with the ADuM3190-chip at all. ? 4. I can't assist you regarding KICAD. As mentioned above, ADuM3190-chip is not mandatory. ? 5. For transformer design, pls refer to the following articles ? ? ? ?
and
? best regards Udo ? |
Re: Access .model parameters by name in expressions
¿ªÔÆÌåÓýOn 10/05/2025 10:10, andrewsimper via
groups.io wrote:
I think your guess is correct. This isn't an "official "no". But since the Gummel-Poon model, for example, is public domain, it would in principle be possible to derive it from the actual characteristics. There is another issue: in most models, some of the parameters are not stated, so remain at their default value, which is often zero, but not always. Therefore they couldn't be extracted from the .model. I don't know for sure, but it's also possible that not all simulators have the same default values. I would think this is enough to deter you from this route, and probably why such a reverse look-up doesn't exist. -- Regards, Tony |
Re: Access .model parameters by name in expressions
Hi Tony,
?
Thanks for the reply. I already know how to create a parameter and use this value in a .model statement of transistor / diode etc, which is what you have shown, but unfortunately this doesn't help with my question.
?
Is there a way to access a value defined in the .model statement of a transistor etc, and then use that value elsewhere in an expression?
?
Is there some syntax like: "getvalue(npnmodel, is)", or "npnmodel.is", or something similar to grab the already defined value out of a .model statement?
?
I scoured the LTSpice docos / online resources but and can't find anything like this, so I am guessing the answer is no, but I thought I'd ask here for an more official "no". I can workaround it in other ways, but having this sort of access would be really useful to prevent a bunch of manual text editing every time I want to try out a different model and calculate derived expressions from it. |
Re: Access .model parameters by name in expressions
¿ªÔÆÌåÓýOn 10/05/2025 03:58, andrewsimper via
groups.io wrote:
If I understand you correctly - yes, this is possible. But rather than try and describe it, I have uploaded one available solution - undoubtedly, there are others. Param-to-subckt-to-model BTW, it is not necessary to use braces when assigning a numeric value to a parameter. --
Regards, Tony |
Access .model parameters by name in expressions
I'm creating some subcircuits and would like to use some parameters of a model in further expressions, but only have to define the value once in the model itself. Is this possible in LTSpice? For example can I use the saturation current of a particular transistor model in a subsequent expression? eg:
?
* define a model with some parameters
.model npnmodel npn(is=1e-16 n=1.02)
?
* access one of the parameters in an expression somehow to calculate a derived value
* - the actual expression will be more complicated than just *2
.param val = {npnmodel(is)*2} |
Re: Single-phase H-bridge inverter circuit
Hi, Andy. Thanks for it! I have not known this way. So easier...
?
By the way, I've noticed the noises I commented before should be my PWM configuration, I'm not able to configure my PWM considering the dead time, so at the moment when one turns off and the other turns on, there's a distortion in my PWM. Is there a standard delay value to consider? |
Re: Single-phase H-bridge inverter circuit
On Fri, May 9, 2025 at 07:23 PM, <guilhermesouzam01@...> wrote:
Are you sure you looked at the voltage across the load resistor?? The easiest way to do that in LTspice is:
?
Andy
? |
Single-phase H-bridge inverter circuit
Hello all!
I'm trying to design a circuit for my college project. I suspect that I'm also configuring my PWM sources incorrectly, maybe messing up the dead time... it's all a bit confusing. You can find the schematic through the link below. Thank you! ? [Link to off-site file on Google drive removed] [Mod note:? Never point us to off-site storage.? Upload your schematic to this group's Files area.]
? |
Re: Simulation of MMC 3-Level on Ltspice
On Fri, May 9, 2025 at 05:43 PM, <Bouzid.wis@...> wrote:
I am sorry, but that description does not explain to me how it works, not in a way I can understand.? There are many things interacting here, including the fact that the source of pull-up current is through a resistor and an inductor, it is not a voltage source, and there is a capacitor in the current path when M1 switches ON.? Plus there is the reactive input impedance of the output filter.? M1 does not directly switch a positive voltage to the unfiltered output, which I think was what you think would happen.? For that to happen, R1 and L2 and C1 should not be there. ?
Do you understand how it is really supposed to work?
?
What is the problem?? Is there a problem?
?
Are the two submodules not symmetrical to each other?
?
I see a sine wave at the filtered output, and it looks like a reasonable replica of the input sine wave.? That suggests that maybe the circuit works.
?
I think you are mistaken if you think the unfiltered output should alternate between +20 V, 0 V, and -20 V.? I do not see a way for your first circuit to make the unfiltered voltage do that.
How would the unfiltered output voltage go to 0 V?? Is there anything in your circuit that can drive the unfiltered output to 0 V?? I do not see one. ?
But I hope you realize I am unfamiliar with this circuit, and that does not help me explain what happens or does not happen.? I am "in the blind".
?
Andy
?
? |
Re: Simulation of MMC 3-Level on Ltspice
Thanks for your Answer.
?
How each submodule affects the output in a single-phase MMC
?
In a single-phase Modular Multilevel Converter (MMC), the output typically consists of an upper and a lower submodule. Each submodule can pull the output either up (positive voltage) or down (negative voltage) by switching the voltage of its internal capacitors.
?
Upper submodule: When the upper MOSFETs (e.g. S1) are conducting, the positive voltage of the upper capacitor is applied to the output, while the lower MOSFETs (e.g. S2) close the current path or bypass the upper branch.
?
Lower submodule: To pull the output down, the lower submodule (e.g. S3) switches its internal capacitor into the current path, while the lower bypass MOSFETs (e.g. S4) allow current to flow through the lower branch.
?
The change between these states is controlled by the PWM control signals, which use either V(tri_up) or V(tri_dwn) as the carrier signal to control the switching on and off of the MOSFETs.
?
the two submodules must be symmetrical to each other, can you show me where the problem is.
yes I have looked at the file, but the output voltage should not look like this.
please have a look at the picture i uploaded in the temp named output.
i also uploaded another simulation circuit (named M2C single phase SPWM11) where i simulated the circuit with only one carrier signal, but the unfiltered voltage is not stepped with clear voltage levels: +20V, 0V, -20V, but only +20V, -20V. Probably because I only used one carrier signal. But the current at the load and the filtered voltage look good. ?
|