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Re: How to include component values in LTSpice trace formulas
Thank you, Tony - that's even better than what I was looking / hoping for. I'll be studying what you've done to become more adept at it. I wasn't even aware of the measurement subsystem before, and I
By Doug Fay · #108560 ·
Re: DN3545 N-Channel, Depletion-Mode Mosfet Model Possible in LTSpice?
Hello Donald, Thanks for the pointer. Does this imply that I can turn a suitable enhancement mode N-chan VDMOS into a depletion mode device by just inverting VTO? Sounds so easy ;-) ! Jan Didden
By linearaudio@... · #108559 ·
Re: How to include component values in LTSpice trace formulas
0cab7709201904469fc4e9d8929c0f93 wrote: "To answer a question in one of the responses about what I'm trying to do, it's to try various values of C, L and other parameters for an LC tank circuit for a
By Tony Casey · #108558 ·
Re: How to include component values in LTSpice trace formulas
... I forgot to clarify that the capacitance value does not change over time - I just want to try different values to figure out what works best. But I don't want to have to remember to put the
By Doug Fay · #108557 ·
Re: How to include component values in LTSpice trace formulas
Oooops - just found a problem with using .PARAM statements to do what I wanted. To briefly summarize my objective, it is to plot a trace of the energy stored in a capacitor over time. I want to use
By Doug Fay · #108556 ·
Re: Funny problem in simulation with .option gshunt=1.5e-7
Hello Alan, I just tried again with gshunt to check that it really has been used inside the subcircuit. I got +25% more supply current even with only gshunt=1e-11. The more interesting option is gmin
By Helmut Sennewald · #108555 ·
Re: Funny problem in simulation with .option gshunt=1.5e-7
Now you node better. John Woodgate OOO-Own Opinions Only J M Woodgate and Associates www.woodjohn.uk Rayleigh, Essex UK
By John Woodgate · #108554 ·
Re: Funny problem in simulation with .option gshunt=1.5e-7
Thanks guys, I thought this only add to the external circuits, not the inside of the opamp. Now I know. I notice the Ti models don't work as well as the LT models, The LT models don't need to play
By Alan Liu · #108552 ·
Re: Funny problem in simulation with .option gshunt=1.5e-7
I thought this only add to the external circuits, not the inside of the opamp.
By Alan Liu · #108553 ·
Re: How to include component values in LTSpice trace formulas
Thanks so much Andy, and the other folks who responded. That's the approach I'll use. To answer a question in one of the responses about what I'm trying to do, it's to try various values of C, L and
By Doug Fay · #108551 ·
Re: Funny problem in simulation with .option gshunt=1.5e-7
Ala, Gshunt should probably be no larger than 1e-10. Your value (1.5e-7) is a thousand to a million times too large. Side-effects like the ones you observed should be expected. Andy
By Andy · #108550 ·
Re: Problems using Pspice fet model for infineon BSR202N.
Richard, TRTOL is not very well understood, by most of us. Almost all SPICE programs set TRTOL to 7, which is a slightly odd number. Most SPICE users don't change that. LTspice's default is 1, and
By Andy · #108549 ·
Re: LTSpive IV vs XVII voltage generators
Thanks to all who replied to my question about this. Larry Benko
By Larry Benko · #108548 ·
Re: Funny problem in simulation with .option gshunt=1.5e-7
Hello, Adding 6MegOhm resistors from every node to GND will kill practically every circuit, because there are resistors with kOhm to MegOhms inside the subcircuit. Best regards, Helmut
By Helmut Sennewald · #108547 ·
Funny problem in simulation with .option gshunt=1.5e-7
Hi I encountered a strange problem, I uploaded the file in Temp. It's a simple circuit using LT6202. If I put in .option gshunt=1.5e-7, you can check current through R2 and R3 is 50mA. But if you
By Alan Liu · #108546 ·
Re: Problems using Pspice fet model for infineon BSR202N.
Ok. Sorry. I've solved the curiosity. I put in a delay in my gate drive to allow for the delayed "startup" voltage sources. It was my delay causing it to wait 20us before doing anything..
By Richard Chapman · #108545 ·
Re: Problems using Pspice fet model for infineon BSR202N.
Thank you both Bordodynov and Andy. That was extremely helpful. I'm hoping you can confirm my understanding, that reducing TRTOL slows the simulation but should make it more accurate. It should not
By Richard Chapman · #108544 ·
Re: LTSpive IV vs XVII voltage generators
Excellent catch. Bravo! This question is closed. ---In LTspice@..., <imbvlad@...> wrote : I remember I noticed this but also that there was an entry in the changelog about this and, sure
By analog spiceman · #108543 ·
Re: LTSpive IV vs XVII voltage generators
I remember I noticed this but also that there was an entry in the changelog about this and, sure enough, here it is: 04/24/18 Corrected the behavior of SINE voltage and current sources when Ncycles is
By Vlad · #108542 ·
Re: Edge triggered b-source logic and integrated averaging in LTspice
Hello analogspiceman, Thanks for your uploaded example "sampled_average_expanded.asc". I have now a better understanding after I plotted V(4), V(3) , V(x) and V(s) in one plot.
By Helmut Sennewald · #108541 ·