开云体育

Hello Jerry, Thanks. I got the paper.

Hi Helmut, The paper is: Tsividis, Y. and Milios, J.; Journal of Electroanalytical Chemisty, 707 (2013) 156-165 Thanks again, Jerry

Dear Helmut! Sorry for the missunderstanding! It was the second time, when I have been used this topic. I'm very thankful. Greetings from Hungary, Miklos

Hi Andy, What I mean is when a file name has the "2 input and gate" drawing before the file name, then what I know is it is a symbol file that can be loaded directly to the "sym" directory. When a

Hello Jerry, I am very interested to see the paper. This helps me to check whether the implementation in LTspice is equivalent. Best regards, Helmut

Eric, I think Bordodynov's symbol uses the same technique as one of the two I described. I'm not sure what you say about the AND gate, because none of these symbols had AND gate icons in them. In any

Hi Andy, Thank you so much once again. It already worked with the first approach in your earlier email so maybe I can try this one if a new oppurtunity comes. Best regards, Eric

Jerry wrote, "I am plotting V(N002)/I(R11)." FYI, that does not constitute impedance. Even though it has the right units, V(N002) is not across R11, therefore it is something other than impedance.

Hi Andy, Thank you very much again! It works! Really appreciate your perseverance to help and support us newbies to LTspice XVII. Best regards, Eric LTspice@...> wrote:

Hello Bordodynov, Thank you for your advise. I checked it out but was a bit confused how and where to save it as it doesn't have the "and gate" icon for a symbol. But thank you very much for taking

Jerry wrote: "The Bode plot of the input impedance shows a phase shift of 0 to -45 degrees, but the expected result is -45 to -90 degrees." The impedance plot that I see goes from 0 to -90 degrees.

Helmut, I am plotting V(N002)/I(R11). The plot profile looks OK, but, as mentioned, the phase is off by ~45 deg. Thanks and best regards, Jerry

Hello Jerry, I have opened your uploaded circuit, but I don't know which voltage or current I should look. I am very interested to see the paper where this circuit comes from. Please show a link and

Helmut, I uploaded the .asc file. 20181123_exact_Paper_LTspice. Thanks for all that you do! Best regards, Jerry

Hello, Your circuit requires 3 important changes. The three V-source used as gate driver has to be connected to "Vout" instead of GND. The series resistors of these V-sources has to be chnaged to e.

John noted, "Andy, I don't think a max time step was set, only a delayed start to saving data." Oo, right. My dyslexia (don't we all have a little, at times?) read it as ".tran 500m 0 20m". Nevermind

I agree; the simulation runs OK. But you would see much better if you gave the DC outputs different labels, Vout1, Vout2,? Vout 3 and simulated from zero time to 50 ms. You can then change the labels

csizikem, please don't use those long URLs that begin with "xa.yimg.com". They are temporary, and might work only for you. Instead, just let us know that the file is named "3ph_rectifier.rar" and that

The long link you give doesn't work. The never do, they are only valid for a few minutes and usually only for the uploader. Best wishes John Woodgate OOO-Own Opinions Only J M Woodgate and Associates

No-one can tell by extra-sensory perception. Upload your .ASC files AND all the other files required to run the simulation as a ZIP archive to Files => Temp and then tell us you did that. Besides,