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Hello, Although I am not the best person to answer this question I can answer it in part. When it asks you to "copy" the schematic from the library it means to copy the .asy file from the /symbols

I am not understanding where/how to put 3rd party .SUBCKT files into LTSpice. The explaination in the PDF manual seems to have the cart before the horse. I "drew" a schematic using Opamp2. On page 94

I would suggest the following approach: Plot -d(im(log(V(out))))/2/pi and export the result as Cartesian data. The real part will be the group delay, the imaginary part will be zero. LTspice is really

<helmutsennewald@...> wrote:

<david.edmondson@...> wrote: Hello Dave, There are models for the 74HC195 and 7HCT195 in the Files section. Files > Lib > Digital 74HCTxxx Files > Lib > Digital 74HCxxx Maybe the 74HCT195 model is

Hello Varoli, There is no way to directly export group delay in LTspice. You could plot and export the phase ph(V(out). This will require a little bit less work in the external post processing to get

Does anyone have a model please for a SN55ALS195 or SN75ALS195. Nothing comes up on Google. Regards....Flyfisher

It looks like the description changed. It used to be limit( x, y, z ) = min( max( x,y ), z ) now it says limit( x, y, z) = intermediate value of x, y, or z At least I don't have to remember the order

Hello Tammo, I wouldn't say the help-manual is incorrect. It only doesn't mention all possible cases. I think the description shown in the help pages is the same as in other SPICE programs. Best

Hello Tin, You should apply the input voltage to "Vin" in the example below. Therefore you have to replace Vin with V(in). I have made an example for a complete ADC with sample/hold plus a DAC for

As a substitute, you can use a comparator powered between +10 and -10 with the input threshold set at +2.5. It would need to have a totem-pole output , not open collector. You can simulate slew rate

Having said that, I quick simulation clearly shows that all 4 variations of min, max, function work as expected. My apologies to Helmut. He was correct after all. I suppose the manual is incorrect.

Helmut, it don't think this statement is quite correct. The manual states that : limit(x,y,z) = min( max(x,y), z) If we go through the permutations: limit( 0, 1, 2 ) = min( max( 0, 1 ), 2 ) = min( 1,

hi helmut, really appreciate and grateful for your help as i was given the shortest time possible to finish simulating adc and Ltspice is totally foreign to me >.< right now i could only use the

I need to export group delay data from several circuit simulation for comparison purposes. From plot window i can only export trace data in polar or cartesian format, even if I plot only group delay.

Hi all is there any RS232 Transceiver available in LTspice ?? If so where to locate it or send me its model if someone has developed it personally. Alternatively how could this function be

Hello tin, The limit() function limits the output value. limit(min, max, function) limit(min, function, max) The order of the parameter doesn't matter. I have uploaded an example "limit1.asc" to the

hi helmut, may i know how the 'limit' works? my interpretation of it seems to be wrong because the i can't get my circuit working regards, tin <helmutsennewald@...> wrote: <hjzwerver@> wrote: block

Thanks Varoli, appreciate your help. <mailto:LTspice%40yahoogroups.com>, all

Thanks Helmut.. Actually 10 was just an example. I am modeling nerve fibers in LTspice and I have around 100 netlists, probably more. No schematics. The result I am looking at is the sum of all the