Keyboard Shortcuts
Likes
- LTspice
- Messages
Search
Re: CIC unstable output
This is from my phone, so it may be abreviated and spelled poorly. Perhaps the problem is that the analog nature of the delay lines allows small errors to grow due to the very high gain. Maybe buffering the output with quantizing b-source would help (one that can only take on valid digital values).
|
Re: JFET Model
That was easy thanks. Chris? On Sun, Dec 22, 2013 at 3:56 PM, <helmutsennewald@...> wrote:
|
Re: CIC unstable output
Hello, Vlad -
toggle quoted message
Show quoted text
I have always found it challenging to translate discrete digital filters back into the analog for simulation. It is very easy to make errors that are not obvious but which completely mess things up. I've not taken a look at your project but, even a few stages will make it more difficult than you would like. It MIGHT be helpful if you describe in detail the discrete digital structure that you are trying to simulate. Jim Wagner Oregon Research Electronics On Dec 22, 2013, at 10:59 AM, <imbvlad@...> <imbvlad@...> wrote:
|
Re: CIC unstable output
John Woodgate
In message <l97cr5+1isqo3s@...>, dated Sun, 22 Dec 2013, imbvlad@... writes:
Thank you for the directions, but I wouldn't have started something if I didn't have at least one clue about it :-)I realise that, if you are referring to my comments about the results of a Google search. It is certainly unfortunate if you can learn nothing additional from the documents there that is of value for your present project. -- OOO - Own Opinions Only. With best wishes. See www.jmwa.demon.co.uk Nondum ex silvis sumus John Woodgate, J M Woodgate and Associates, Rayleigh, Essex UK |
Re: CIC unstable output
Thank you for the directions, but I wouldn't have started something if I didn't have at least one clue about it :-) It's true that I can't say I'm an "expert", but I'll manage, somehow. The problem, though, isn't knowing what a CIC does, but what LTspice shows up when using it, otherwise I wouldn't have asked for help here. Vlad |
Re: CIC unstable output
John Woodgate
In message <l97732+1panslk@...>, dated Sun, 22 Dec 2013, imbvlad@... writes:
There is a lot of information disclosed by a Google search for CIC filter, but I don't claim to understand it. Even so, it looks like it might help.I really don't know what a CIC filter is and how it is supposed towork. -- OOO - Own Opinions Only. With best wishes. See www.jmwa.demon.co.uk Nondum ex silvis sumus John Woodgate, J M Woodgate and Associates, Rayleigh, Essex UK |
Re: CIC unstable output
> I really don't know what a CIC filter is and how it is supposed to work. If you say so. Being no expert either (by far), here's what I know, in short: they're a cheaper approach to interpolators/decimators because they're multiplier-free (not that it would matter in LTspice) and can have arbitrary rates. The lower chain are the integrators, as you said: y[n]=y[n-1]+x[n] (hence the inverting tline fed to the inverting input of the G-source). Due to the high gain at DC they're the most unstable and a CIC of N sections will have a gain at the output (M*R)**N (the inverse of the current input gain), where R is the rate and M the number of samples for the comb section (y[n]=x[n]-x[n-M]). This is also one of the major downsides, the bit growth. Inverting the chain order and using downsampler results in a decimator. Now, as far as LTspice is concerned, considering two adjacent samples as a step input, and since a tline will not interpret this as a digital signal (well, nothing, really) it means that the sharp shape will not be preserved, anymore. Because of this, I would expect the signal to be distorted after 8 stages of integrators, but only around the step change. As you noted, even if you have to zoom in quite a bit to realize that, the waveshape is no longer a "straight line" and, because we're talking about integrators, the smallest error will gain large proportions at the end. So, let's say that this is the normal behaviour, that passing a (sampled) signal through several tline stages will distort the signal up until the samples, themselves, no more "straight line". But then how come this problem doesn't arise in the FIR filter? If you try Files/Filter/Filter/Filter.* and set it to a 256 length FIR and similar settings as the CIC, you'll notice no such problem. True, you may need to tinker with tr and td, but even the last sample in the simulation will be "normal", LTspice-wise. As mentioned, I also tried adding S&H between stages. After all, the delay is a S&H in itself. At first, between 6th and 7th as there seemed to be where the errors gained proportions (later ending up with one between every stage). Like this, the output goes well sampled for a while, but then starts going exponentially upwards or downwards because of the "non-linearity" of the samples, the wobbly waveform, they sample with errors and all. I thought this is because of the upsampler. The SW has Ron=1 and Roff=1u, meaning that where there should be zero-samples there are, in fact, non-zero ones, a million times lower, yes, but non-zero. So, I replaced the SW with R17 and added a B-source with V(0.3) [upsampler clock] times V(108) [the output of the 8th comb]. Since the clock has 0 and 1V values only, the zero-samples were as they should be. Not only that didn't solve the problem, but it only brought another one as the B-source itself needed tripdv/tripdt settings on its own, which meant an extra complication because tinkering with those two settings implies first running the simulation, then modifying, then re-running, ... In the end, the only ones (hard-)influencing the result are the clocks made with voltage/current sources. For this reason, the S&H, as it is now, has a sine source as its clock, to avoid sharp transitions and let only V(0.3), the rate clock, to affect the sampling. The analog input signal, V1, also influences this; try changing it, for example, to: pulse 0 3 0 {0.77/f} {0.23/f} 0 {1/f} and see the what happens.? If you have a bit of time and are willing, see for yourself with this little experiment: set up one integrator just like those in the CIC, with Td=1, and use this input: V1 0 a pulse 0 1 1 1m 1m {ton} 2 Run this for 10 sec, no timestep imposed, with ton=0.5 and then ton=1, see the difference. Also relevant is using the source as simply: pulse 0 1 1 1m , same simulation. It can be clearly seen that, as long as there are no "synced" sharp transitions from the source, the output of the integrator simply relaxes itself greatly. If it would have been only this, fine by me, a tight timestep should solve the problem, but the tline seems to count that relaxed timestep as its input. Adding a simple inverter, separated, with output connected to input and td=1 (oscillator) won't solve the problem, its tripdt only influences the A-device. Adding a B-source (between ground and x) with delay(V(a),1) will influence the general result if tripdv/tripdt are specified, but that's not a solution because, like above, those two settings imply running and re-running the simulation when this is meant to be a subcircuit. At this point, I honestly don't know whether this should be the answer to expect or not, to expect those spikes to happen or not. I'm also out of ideas at this point. Vlad |
Re: A three Phase question please
John Woodgate
In message <1387726122.76180.YahooMailNeo@...>, dated Sun, 22 Dec 2013, kim nielsen <dkkiboni@...> writes:
Use UF4007(SF4007), they are 1A, 1000V, 75nS Trr and cheap. 1n4148 have only 75volt reveres voltage.Even so, I would put 1 meg resistors **rated for 1000 V at least** across each diode. Vishay VR37 type, for example. -- OOO - Own Opinions Only. With best wishes. See www.jmwa.demon.co.uk Nondum ex silvis sumus John Woodgate, J M Woodgate and Associates, Rayleigh, Essex UK |
Re: A three Phase question please
Use UF4007(SF4007), they are 1A, 1000V, 75nS Trr and cheap. 1n4148 have only 75volt reveres voltage. 10pcs. in series gives 10KV. I would use 11 to have som margen. The biggest problem with this kinds of circuits are corona, and do you have any expiriences about corona? or else dont mess around with this kind of curcuit. It is highly dangerus. ? Med venlig hilsen, Kinds regards
Kim Borg Nielsen On Saturday, December 21, 2013 9:40 PM, "smalcolmbrown@..." wrote:
?
Yes it is a FuG 200 Radar set. I like reverse engineering things to see how they work. I understand PPI its the other approaches that I find interesting. a stack of 1N4148's shudder a large stack then. Ta for the Idea. I think I got as far as 5?Schottky ?power devices and gave up. Damn Yahoo still is not letting me have POP3 access to my email and the interface still doesn't like html emails :( It has been a week and a half since this happened and they still have not replied to my complaint :( Merry Yule to all
Suusi M-B |
Re: Sub ckt
---In LTspice@..., <zardos49@...> wrote:
Thanks Helmut ! I had the files scattered and it could not find them.
Sent from my BlackBerry? by Boost Mobile Don't scatter files! Don't put any user-file (LIB, model, subckt) in LTspice programfolder. Put all files in a private folder below .../user/... Helmut told it every time, but new users never seems to read the "ReadMe" PS: reading the FAQ (Help/HelpTopics - when you start the program) willanswer most of your question. hws |
Re: CIC unstable output
Vlad asked: "At least does anyone know why the samples lose their constant-time values?" I think what you're asking is, why does the waveshape appear to lose its staircase appearance. ?Well it still is a staircase, but there is so much going on once the signal passes through the lower (integrator) stages, that you need to zoom in to see it. ?I think that is the expected result (i.e., nothing is wrong).
Andy |
Re: CIC unstable output
Vlad,
Still much confusion here ... I really don't know what a CIC filter is and how it is supposed to work.
Do the eight lower stages act as integrators, similar to analog integrators? ?The delayed output of each summer (G element) is fed back into the summer, so it would seem like any one of those eight stages will easily "blow up" ... unless its average input is precisely zero ... or without the help of negative feedback to prevent it. ?I would expect the same thing if I cascaded several analog integrators in a row.
This makes me think: why would I not expect the output to go unstable?
Something I saw about CIC filters seems to imply that one should alternate comb sections with integrator sections. ?Perhaps as a way of controlling instability. ?But this is going dangerously far into territory about which I know nothing.
About the current source I1, I missed the fact that the S/H has an Rout != 0. Andy |
Re: Sub ckt
Thanks Helmut ! I had the files scattered and it could not find them.
Sent from my BlackBerry? by Boost Mobile From: <helmutsennewald@...>
Sender: LTspice@...
Date: 21 Dec 2013 12:33:13 -0800 To: <LTspice@...> ReplyTo: LTspice@...
Subject: [LTspice] RE: Sub ckt Hello Jack, Copy the model file into the folder of your schematic. Here is an example: All Files > Lib > BFR93A http://groups.yahoo.com/neo/groups/LTspice/files/%20Lib/BFR93A/ Best regards, Helmut ---In LTspice@{{emailDomain}}, <zardos49@...> wrote: I need a simple 1 transistor circuit example with the transistor using a subckt and the attached file and location of file called out. I want to standardize my oth files to it. Please give example. Fwd to Zardos49@...
Sent from my BlackBerry? by Boost Mobile |
Re: A three Phase question please
Yes it is a FuG 200 Radar set. I like reverse engineering things to see how they work. I understand PPI its the other approaches that I find interesting. ?power devices and gave up. Merry Yule to all |
Re: Sub ckt
Hello Jack, Copy the model file into the folder of your schematic. Here is an example: All Files > Lib > BFR93A http://groups.yahoo.com/neo/groups/LTspice/files/%20Lib/BFR93A/ Best regards, Helmut ---In LTspice@{{emailDomain}}, <zardos49@...> wrote: I need a simple 1 transistor circuit example with the transistor using a subckt and the attached file and location of file called out. I want to standardize my oth files to it. Please give example. Fwd to Zardos49@...
Sent from my BlackBerry? by Boost Mobile |
Re: CIC unstable output
Andy According to this link:??it is possible to have up to 8 stages, though it's true I haven't made one myself. This is to be a CIC interpolator/decimator up to N=8, found in Files/Filter/Filter.* , for the sake of completeness. It works just fine except for those symptoms. Somehow I think it would be nice for LTspice to have a digital simulator, too, to be able to separate the elements' nodes or to have special interconnected symbols that allow for mixed-signal simulation, because a even a simple step signal through an A-device may result in a less-than-digital output (all in favor of transient response). Vlad PS: I hope I didn't let the impression I was waiting for you, only, to answer, as much as I appreciate your answers.?:-) |
Re: A three Phase question please
¿ªÔÆÌåÓýHi SuusiOn 12/21/2013 04:05 AM,
smalcolmbrown@... wrote:
I I have thought about the use of a switched mode, mainly for valve amplifiers, but wonder about the extremes of generating 800V DC at high frequency. I have not seen high speed rectifiers with greater than a 100 V rating. I guess that they exist, but the price tag is prolly horrendous and or the supply limited to defence contractors only. Not too long ago, i played with switch mode HeNe laser power supplies. The voltages and currents there are similar. The rectifiers are stacks of low voltage fast recovery types. I remember that they werent expensive. (You could stack your own 4148s, theyre cheap.) This might help: The circuit I'm playing with, dates from WW2. It discharges 0.7 Joules in 2uS every 20mS (350Kw) into a 24:1 step up transformer¡ Yes 10kV pulses¡ Everything about this circuit is extreme. Sounds like an old radar? Fun! -- AC2CL I do not think there is any thrill that can go through the human heart like that felt by the inventor as he sees some creation of the brain unfolding to success... Such emotions make a man forget food, sleep, friends, love, everything. - Nikola Tesla |