> Thanks to Helmut for the hints to making model-libs and coverting
plain Spice-
> Ascii text.
> I encounterd problems with the model of the vacuum tube 12AX7
below. Apart from
> being rather far from reality, this model seems to produce
>convergence problems.

Hello Arnold,
I tried your example also without luck. The next step you normally
would do is testing the transfer function I_A(Ugk).
Ok, I did it for you. The gain was a factor of 1000 to less. I
remembered something with '^' and '**' for the power operator. After
some trial and error I came to the conclusion that LTSPICE has been
guilty for the wrong result.

Hello Mike,
why doesn't LTSPICE follow SPICE3 syntax with the '^' power operator.
LTSPICE only accepts '**' for the power operator. If I tried '^' for
the power, the result seems to be always 1.


Now Arnold, it is clear would you have to do. Replace any '^'
with '**' in all your models. I tested it already with the **
operator and it is then ok.

Example:
>BLIM LI 0 V=(URAMP(V(A)-V(K))^1.5 )* 1.6e-5
BLIM LI 0 V=(URAMP(V(A)-V(K))**1.5 )* 1.6e-5

Best Regards
Helmut

Hello Helmut,
thanks to you for this fine solution. Now it all works.
best regards, Arnold

--- In LTspice@..., Panama Mike <panamatex@y...> wrote:

After some trial and error I came to the conclusion
that LTSPICE has been guilty for the wrong result.

Not this time!

why doesn't LTSPICE follow SPICE3 syntax with the

'^'

power operator. LTSPICE only accepts '**' for the
power operator. If I tried '^' for the power, the
result seems to be always 1.

The behavioral source syntax is given in the help in
LTspice=>Circuit Elements=>B. Arbitrary behavioral
source. '^' means Boolean exclusive OR. '**' is
exponentiation. SPICE3 doesn't have Boolean exclusive
OR. PSpice uses '**' for exponentiation and it also
implemented use behavioral sources before Berkeley,
so here, PSpice is the standard, not Berkeley SPICE.

Hello Mike,
sorry for my too fast judgement. I have overlooked the '^' XOR
operator in the LTSPICE help page.

Thanks for your reply,
Helmut

After some trial and error I came to the conclusion
that LTSPICE has been guilty for the wrong result.

Not this time!

why doesn't LTSPICE follow SPICE3 syntax with the

'^'

power operator. LTSPICE only accepts '**' for the
power operator. If I tried '^' for the power, the
result seems to be always 1.

The behavioral source syntax is given in the help in
LTspice=>Circuit Elements=>B. Arbitrary behavioral
source. '^' means Boolean exclusive OR. '**' is
exponentiation. SPICE3 doesn't have Boolean exclusive
OR. PSpice uses '**' for exponentiation and it also
implemented use behavioral sources before Berkeley,
so here, PSpice is the standard, not Berkeley SPICE.

--Mike

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--- In LTspice@..., Arnold Esper <arnold.esper@n...>
wrote:

Thanks to Helmut for the hints to making model-libs and coverting

plain Spice-

Ascii text.
I encounterd problems with the model of the vacuum tube 12AX7

below. Apart from

being rather far from reality, this model seems to produce
convergence problems.

Hello Arnold,
I tried your example also without luck. The next step you normally
would do is testing the transfer function I_A(Ugk).
Ok, I did it for you. The gain was a factor of 1000 to less. I
remembered something with '^' and '**' for the power operator. After
some trial and error I came to the conclusion that LTSPICE has been
guilty for the wrong result.

Hello Mike,
why doesn't LTSPICE follow SPICE3 syntax with the '^' power operator.
LTSPICE only accepts '**' for the power operator. If I tried '^' for
the power, the result seems to be always 1.


Now Arnold, it is clear would you have to do. Replace any '^'
with '**' in all your models. I tested it already with the **
operator and it is then ok.

Example:

BLIM LI 0 V=(URAMP(V(A)-V(K))^1.5 )* 1.6e-5

BLIM LI 0 V=(URAMP(V(A)-V(K))**1.5 )* 1.6e-5

Best Regards
Helmut

Thanks to Helmut for the hints to making model-libs and coverting plain Spice-
Ascii text.
I encounterd problems with the model of the vacuum tube 12AX7 below. Apart from
being rather far from reality, this model seems to produce convergence problems.
LTspice throws an abort "time intervall too small" whatever time invall I put in
the .tran and also controlPanel. The shown waveform heavily varies.
Winspice concludes computing.

I earlier decided to develop Musician's Ampifiers, which imitate a tube-
Amplifier together with it's output transformer using analog and switched
circuits - not computing it, this had been done already. Guitarists love there
sound, I do so too. I intend a switched output stage and supply to save power
consumption and weight. There main features are:

- huge dynamic range
- nonlinearity depending on the signal's time domain
- compression effects (and filtering) highly depending on the signal
- some strange storage effects at medium and high levels

I made lots of step-/puls-responses of this kind of amplifiers to get there
behaviour. I is quit more than just nonlinearity.
Are there special devices from LT for this purpose ?
thanks, Arnold



* ECC83_2.cir

V1 1 0 DC 0 AC 1 PWL(0 0 1m 0 6m -5 16m 5 21m 0)

R1 1 0 100K
R3 3 0 2.2K
R4 4 100 150K
X1 4 1 3 NH12AX7

VP 100 0 DC 250

.TRAN 100u 50m 0 100u
.PRINT TRAN V(4)


* GENERIC: 12AX7 / ECC83
* MODEL: NH12AX7
* NOTES:
*--------------------------------------------------------------------------
* Connections: Anode
* | Grid
* | | Cathode
* | | |
.SUBCKT NH12AX7 A G K
*
* ANODE MODEL
BLIM LI 0 V=(URAMP(V(A)-V(K))^ 1.5 )* 1.6e-5
BGG GG 0 V=V(G)-V(K)--0.53056
BRP1 RP1 0 V=URAMP(-V(GG)* 0.076498 )
BRP2 RP2 0 V=V(RP1)-URAMP(V(RP1)-0.999)
BRPF RP 0 V=(1-V(RP2)^ 1 )+URAMP(V(GG))* 0.18
BGR GR 0 V=URAMP(V(GG))-URAMP(-(V(GG)*(1+V(GG)*-0.013621 )))
BEM EM 0 V=URAMP(V(A)-V(K)+V(GR)* 87.302 )
BEP EP 0 V=(V(EM)^ 1.5 )*V(RP)* 1.11e-6
BEL1 EL1 0 V=URAMP(V(EP))
BEL EL 0 V=V(EL1)-URAMP(V(EL1)-V(LI))
BLD LD 0 V=URAMP(V(EP)-V(LI))
BAK A K I=V(EL)
*
* GRID MODEL
BGF GF 0 V=(URAMP(V(G)-V(K)--0.2 )^1.5)* 1e-5
BG G K I=V(GF)+V(LD)
*
* CAPS
CAK A K 0.7P
CGK G K 2.4P
CGA G A 3.9P
*
.ENDS



.END

开云体育

Bill -

Are you volunteering to join me in a chorus of "Take this Job and
Shove It"? (Are you old enough to remember "Up the Establishment"?)

I'll bet it really WAS work related - weren't you using LTSPICE as a
vehicle to test the capabilities of that company computer and make
sure they got their money's worth?

Yeah, I was using it to poke around a little in Deane Jensen's JE-990
opamp topology. For serious audio, that discrete circuit still (after
almost 25 years) has a lot going for it.

Dale

Brian -

Thanks for taking the time to make these points. You seem to have an
excellent grasp of how simulation fits into the larger picture of
creating a producible design. EDA Tool integration - library
management - model validation - I never could get these ideas across
to my last employer! His attitude was, "This assembly has a high rate
of failure in production test for the last month. Can this SPICE
program show us what's wrong so I can tell manufacturing after lunch?"

As for Scotland - Since I have a Scottish name, I've been curious
about what the place was like. It's impressive that the Romans
conquered half the world, but put a wall across northern England
because they were finally up against somebody they couldn't beat.
King James' (the 6th, of Scotland, as I recall) Bible was the standard
for over 3-1/2 centuries. And Engineering must be a terribly
competitive craft when you're among a people who produced the likes of
Napier, Watt and Maxwell.

Thanks again for your comments,

Dale Thomas Chisholm


--- In LTspice@..., brian.howie@b... wrote:

In what companies is LTSpice used as part of the circuit design

process?

I know that a number of people here use it unofficially. Our
so-called "prefered" simulator is SABER for some strange reason,
although our ECAD does (thank God) support Accusim -a Spice based
simulator.

Both official simulators are part of an integrated tool-set that
allows (in theory anyway) design from a high level behavoural
model through detail discrete circuit and IC design and layout
to PC board layout with a common component library (physical
and virtual).

You will find this to be the case in most large companies i.e.
the simulator is only one part of the picture; other tools that
can take data directly from the schematic capture are very
desirable in order to avoid mistakes. There is also the
problem of configuration control of data and shared libraries
(which version are we working on ?) A large team can be working
on the one design concurrently in our ECAD environment -all
seeing the current version.

The fact that LTSpice is standalone, does make it non-ideal in
these respects. However I am tending to use it more and more
for small circuits or parts of circuits or for debugging
designs. The official simulators are not efficient for this,
they are better for really big hierarchical designs and data
management.

The huge "plus" is that I can run the accusim netlists on
LTSPICE for sanity checking and vice versa i.e I can attach
an LTSPICE netlist to an Accusim symbol and run it.

I am very impressed by LTSPICE and have been recommmending
its use in the context I describe. The only thing lacking
is a monte-carlo (Mike ?)

Good luck in your job hunting. We have places in North America,
if you don't want to come to Scotland.



Brian


--
Brian Howie | Tel: 0131 343 5590
BAE SYSTEMS | Fax: 0131 343 5050
Sensor Systems Division | Email brian.howie@b...
Silverknowes | bhowie@i...
Edinburgh EH4 4AD | Web site www.baesystems.com


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Thanks for the tip!! Do you know if that is representative of the
corporation as a whole, or largely restricted to your location?

Dale


--- In LTspice@..., "Wendell Cowdrey" <wmcowdrey@e...> wrote:

Dale

Try Raytheon. I work there in El Segundo, Calif and our guys use all

kinds of simulations (Pspice, Mathcad, Versions of Berkley Spice,
etc...) during electronic design.

Wendell

John

Thanks for your reply & encouragement.

I agree that analog simulation is one of many tools useful in the
design process. I don't mean to be contradictory or argumentative,
but in my experience it's a tool which has NOT been well understood or
widely used.

- Last week I had an interview with a company that
used ORCAD for schematic capture, parts list generation
and PWB layout but none of the five engineers I spoke
with had used the simulation capability.

- In 1994, I tried to introduce simulation to Hunter
Engineering via PSPICE Lite. As far as I know from
professional acquaintances, that effort died when
the project was cancelled and I was fired.

- At Coinco, the company that fired me in February, only
two of us (out of about 25 electrical engineers)
were trying to apply simulation to design problems.
That started just last summer, with "free stuff" we
could scrounge off the 'net, largely on our own time.
We had CADENCE EDA, but the administration refused to
buy even one license for the Simulation module of that
suite.

- The only place I've seen simulation used was at Emerson
Electric's Space & Defense group, circa 1988-90. The
power supply design group made extensive use of a
Mentor system.

(BTW - let's not quibble over what a "true design position" is. These
were all real design jobs.)

I've learned that the administration must have both a true
appreciation for the tool's capabilities, and a commitment to doing
the job right. If anybody can point me toward organizations that see
circuit simulation as more than "video games for EE's" I'd appreciate it.

Dale

Hello David,
there are Idsoff current specs in the datasheet. They have named it
Idss and Igss.
BSS84 Tj=25 degree:
IDSS drain-source leakage current VGS = 0; VDS = -40 V -100 nA
IGSS gate leakage current VDS = 0; VGS = ±20 V - - ±10 nA

The 2N7002 is modelled with about 0.6nA drain-gate leakage current.
That is the reason why the output voltage is 280mV in the off state.
The BSS84 is modelled with an Idoff current of about 20pA.
You can conveniently probe this. Just do an .OP analysis and move
the cursor to the pins. Watch the staus line at the bottom of the
LTSPICE window.

Best Regards
Helmut

Thanks Helmut!
Dave.

--- In LTspice@..., "David Pariseau"
<david.pariseau@s...> wrote:

The datasheets for the 2N7002 and BSS84 don't have a figure
for Idsoff. Could this figure be included in their models?
Does LTSpice use this figure? If so what is it called and
what would I look for in the model to determine these values?

Hello Davis,
there are Idsoff current specs in the datasheet. They have named it
Idss and Igss.
BSS84 Tj=25 degree:
IDSS drain-source leakage current VGS = 0; VDS = -40 V -100 nA
IGSS gate leakage current VDS = 0; VGS = ±20 V - - ±10 nA

The 2N7002 is modelled with about 0.6nA drain-gate leakage current.
That is the reason why the output voltage is 280mV in the off state.
The BSS84 is modelled with an Idoff current of about 20pA.
You can conveniently probe this. Just do an .OP analysis and move the
cursor to the pins. Watch the staus line at the bottom of the LTSPICE
window.

Best Regards
Helmut

The datasheets for the 2N7002 and BSS84 don't have a figure
for Idsoff. Could this figure be included in their models?
Does LTSpice use this figure? If so what is it called and
what would I look for in the model to determine these values?

Thanks,

Dave.

--- In LTspice@..., "Dale" <dchishol@c...> wrote:

In what companies is LTSpice used as part of the circuit design

process?

I'm expecting to receive an M.S. in Electrical Engineering in May,

and

currently have no job prospects. I'd like to join an organization
where I could explore the application of simulation in the circuit
design process. I haven't encountered any jobs where circuit
simulation is used. I'd appreciate hearing about companies where it
IS used, so I may investigate them as possible employers.

Thanks,
Dale

Dale,

You are going to use simulation in any job that requires you to do
circuit design. I think it's understood that simulation is just
another tool used in the circuit design process. To me, it's no
different than the understanding that you will use tools like a
calculator, scope, logic analyzer, or DMM. Focus on finding a job
where circuit design will be your primary responsibility. It sounds
like the job opportunities you've encountered may not actually be
true design positions. Unfortunately, it's a tough market to be
picky. Good luck in your search!

- John

I use it -at- work, but not for work related purposes. :-)




__________________________________________________
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*** WARNING ***

This mail has originated outside your organization,
either from an external partner or the Global Internet.
Keep this in mind if you answer this message.

In what companies is LTSpice used as part of the circuit design process?

I'm expecting to receive an M.S. in Electrical Engineering in May, and
currently have no job prospects. I'd like to join an organization
where I could explore the application of simulation in the circuit
design process. I haven't encountered any jobs where circuit
simulation is used. I'd appreciate hearing about companies where it
IS used, so I may investigate them as possible employers.

I know that a number of people here use it unofficially. Our so-called
"prefered" simulator is SABER for some strange reason, although our ECAD does
(thank God) support Accusim -a Spice based simulator.

Both official simulators are part of an integrated tool-set that allows (in
theory anyway) design from a high level behavoural model through detail
discrete circuit and IC design and layout to PC board layout with a common
component library (physical and virtual).

You will find this to be the case in most large companies i.e. the simulator is
only one part of the picture; other tools that can take data directly from the
schematic capture are very desirable in order to avoid mistakes. There is also
the problem of configuration control of data and shared libraries(which version
are we working on ?) A large team can be working on the one design concurrently
in our ECAD environment -all seeing the current version.

The fact that LTSpice is standalone, does make it non-ideal in these respects .
However I am tending to use it more and more for small circuits or parts of
circuits or for debugging designs. The official simulators are not efficient
for this, they are better for really big hierarchical designs and data
management.

The huge "plus" is that I can run the accusim netlists on LTSPICE for sanity
checking and vice versa i.e I can attach an LTSPICE netlist to an Accusim
symbol and run it.

I am very impressed by LTSPICE and have been recommmending its use in the
context I describe. The only thing lacking is a monte-carlo (Mike ?)

Good luck in your job hunting. We have places in North America, if you don't
want to come to Scotland.



Brian


--
Brian Howie | Tel: 0131 343 5590
BAE SYSTEMS | Fax: 0131 343 5050
Sensor Systems Division | Email brian.howie@...
Silverknowes | bhowie@...
Edinburgh EH4 4AD | Web site www.baesystems.com


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recipient and may also be privileged. If you are not the intended
recipient please delete it from your system and notify the sender.
You should not copy it or use it for any purpose nor disclose or
distribute its contents to any other person.
***

开云体育

In what companies is LTSpice used as part of the circuit design process?

I'm expecting to receive an M.S. in Electrical Engineering in May, and
currently have no job prospects. I'd like to join an organization
where I could explore the application of simulation in the circuit
design process. I haven't encountered any jobs where circuit
simulation is used. I'd appreciate hearing about companies where it
IS used, so I may investigate them as possible employers.

Thanks,
Dale

Hello Dave,
what's about leakage currents?

Is the voltage Vgs of the BSS84 zero volt? If not, the reason is

the

Idsoff leakage current of the 2n7002.

How big is the leakage current Idsoff simulated by the model of the
BSS84 for Vgs=0?

That's what I thought initially, but the BSS84 leakage current
is only 10na max, 1na typ.

Oh wait, that's GateSource leakage, aha... They don't have a number
for either the BSS84 or the 2N7002 for Drain Source leakage. Could
this be high enough to cause 60mv of offset???

Dave.

--- In LTspice@..., "David Pariseau"
<david.pariseau@s...> wrote:

When I simulate the following circuit I end
up with 60mv for VOUT when the circuit should be off?
Any ideas why? Not sure where the voltage is coming
from.
6v
47pf Batt BSS84 VOUT
+----+---+------+----+ +-----------+--+
| + + + --- |
| --- --- .-. V .-.
| --- - | | | | |20K
| | | 1M| | | 50K | |
|-+ | === '-' | ___ '-'
+->| | GND +-----+-|___|++ |
| |-+ | | +-| + 47pf
| |----+----------+ 2N7002 |<-+---+
| 2N7002 | +-| | |
| | o | .-. |
|=|> === | | ---
VOff | o GND | | ---
Mom.Switch | '-' |
=== 500K | |
GND === ===
GND GND

Dave Pariseau.

Hello Dave,
what's about leakage currents?

Is the voltage Vgs of the BSS84 zero volt? If not, the reason is the
Idsoff leakage current of the 2n7002.

How big is the leakage current Idsoff simulated by the model of the
BSS84 for Vgs=0?


Best Regards
Helmut