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Hey,

I want to simulate a circuit with LTSpice. Therefore I need the MAX917 from Maxim. [/IMG]
Unfortunately there are no models from Maxim - as far as I know.

Does someone know, whether there is an equal model which I could use instead?

Txh!
Hilfesuchender

Thanks, harald, I looked them up, and will give them a try. When I can get one of them to work, I'll repost the circuit.

VB, Maturin

--- In LTspice@..., "carlvanwormer" <carlvanwormer@...> wrote:

--- In LTspice@..., Charles R Patton <charles.r.patton@> wrote:

I would suggest a PWL file driving a voltage source and controlling the
switch resistance as the PWL could model the particular switch
bounce/contact resistance characteristics that will vary considerably
depending on the actual switch being considered. I.e., a wall switch
looks a lot different than a rubber membrane switch, snap-disk switch,
slide switch, or keyboard switch.
Regards,
Charles R. Patton

If you need help trying to figure out what kind of bounce you need to model, check out the wonderful article on switch bounce at:
. With this information as a starting point, you can better determine what type of waveform to model.
Carl B. Van Wormer
P.E. AE7GD
carl@...
www.testecvw.com

Thanks, for the pointer to the good article. I should have explained a bit more -- the bounce model has to reflect the intended switch to be used in the real world as amply pointed out by Ganssle. Another point that Ganssle didn't mention was the need to consider what also happens with time. This is especially important with contact resistance. For instance, two important classes of contacts are 'dry switching' and 'power switching.' Typically dry contacts are low level signals in current and voltage and made with precious metals that don't oxidize and unless hermetically sealed, can still can be contaminated with organics. Power contacts are more refractory metals that can quench an arc but depend on a minimum level of arcing to 'clean' the contact as it oxidizes. This time degradation of contacts can also have other reasons. A carbon loaded rubber switch that bridges two copper pads has a gradually increasing resistance during closure due to organic contamination of the carbon among other things. Recall the once reliable new TV remote control that becomes infuriating after a few years that can be cured by using an eraser on the membrane surface? Like so many things, the devil is in the details!
Regards,
Charles R. Patton

--- In LTspice@..., Charles R Patton <charles.r.patton@...> wrote:

I would suggest a PWL file driving a voltage source and controlling the
switch resistance as the PWL could model the particular switch
bounce/contact resistance characteristics that will vary considerably
depending on the actual switch being considered. I.e., a wall switch
looks a lot different than a rubber membrane switch, snap-disk switch,
slide switch, or keyboard switch.
Regards,
Charles R. Patton

If you need help trying to figure out what kind of bounce you need to model, check out the wonderful article on switch bounce at:
. With this information as a starting point, you can better determine what type of waveform to model.
Carl B. Van Wormer
P.E. AE7GD
carl@...
www.testecvw.com

Hi all. I am testing unipolar simulation using irfp260n model that i got from manufacturer. The max Vgs is 20v and in an attempt to keep the voltage at or below this point i added a 20v diode "B520C" which is rated at 20V 5amps. The simulation runs perfect at or below 20v on the gate but if I exceed it the simulation runs fault. I am attempting to bias the gate this way to see if I can eliminate some of the extra circuitry to bias the gate prior to getting to the gate. If this is an erroneous attempt please let me know. I was hoping the diode would do the trick at the gate but it appears not too when gate voltage is exceeded. The circuit has to be capable of 12 to 24V. If I cant get diode to not overload the gate then I will have to regulate the driver. All IC's are capable of exceeding 24V. I'm uploading .asy, .lib & .asc following..........

Hello,

Long-time LTSpice user and forum lurker, I have only a few posts... This is a circuit question, but I'm working in LTSpice, so it seemed natural to ask the LTSpice community. Apologies if this is too-far off topic.

I have a question in regards to a LED switching converter design. Input voltage is 9V-32V. I'm currently using an MLX10803 from Melexis in a floating-load boost configuration. This results in excessive ripple current in the output caps as well as in the input filter caps. Excessive means the capacitors with the right ratings are quite expensive.

What sort of switching topology should I go to if I want to limit ripple currents in an output stage and in the filter? The LED we're driving is an 11.2V forward-voltage part, so from 9V to Vf, any new topology will either have to boost the voltage to the LED, or, to limit cost, we're now considering a circuit to simply shut the regulator off and drive the LED with a simple ballast resistor (loss should be low at low voltages, LED light output will obviously move proportional to input voltage, this is okay, similar to bulb performance).

Hi Andy-san!

Thanks your kind and clear response.

I have almost finished my a kind of hobby software.
The mistake by this carelessness was committed in such an environment.
You have the outstanding power of understanding and explanation thinks of
you exultantly.
Then, I hope you to download the software of my speaker test software, and
get comment.
Although this may be a whisper of an evil spirit

This thing is not directly related to LTspice.

Shiggy




2012/9/4 Andy <Andrew.Ingraham@...>

Hello Shiggy-san,

I tried to download your LZH file, but I could not open it in my zip
program. It complains about invalid file headers, so maybe my
download was bad. (My zip program is supposed to handle LZH files
too.)

So I looked at TI's datasheet for the PCM2906. Apparently, this IC
includes built-in low-pass filters for the DAC and ADC.

The PASS_BAND is the range of frequencies below half the sampling
rate, where the frequency response should be relatively flat.

The STOP_BAND is frequencies much higher than half the sampling rate,
where there should be a larger attenuation.

In those graphs from the TI datasheet, they are just scaling the
amplitude and frequency ranges (Y and X axes) to look at those
portions of the frequency response curve. For the PASS_BAND plot,
they are looking at frequencies below half the sampling rate (Nyquist
limit). For the STOP_BAND plot, they are looking more at higher
frequencies, to see the larger attenuation there.

I THINK that is what the curves are SUPPOSED to be showing. But those
particular curves do not seem to be consistent with one another.
Figure 23 shows the response is -1dB at about 80 kHz ... but on Figure
22 it is about -6dB at the same frequency, and the -1dB point looks
like it is below 20 kHz. That might just be an error in preparing
those figures in the datasheet (yes, mistakes like that do happen).

Regards,
Andy

Hi Everyone!

Since the numerical value of the frequency axis of Figure 22(STOP_BAND
characteristics) had description of 1K and 10K,
I had made a mistake in the interpretation of the characteristic.
1K should interpret it as IMHz by 1Kx1K, and 10K should have interpreted it
as 10 MHz.
I am sorry to have disturbed you.
I was not familier with stop-band characteristics.
Figure 23 is a expansion of Figure 22, I think.

Shiggy



2012/9/4 shigematsuhiromasa <mr.shigematsu@...>

Hi Everyone!

There is a concept of STOP_BAND and PASS_BAND in ADC.
The picture of those is attached by file name Antialiasing_STOP_PASS.png
in my posted file(Files&#92;Temp&#92;T_ADC.lzh).
The figure is copied from TI data sheet of PCM2906.
I have tryed to study this concept of STOP_BAND Characteristics,
so I have made a schematics of LTspice which name is T_ADC.asc.
(which is also in Files&#92;Temp&#92;T_ADC.lzh)
In this schematics, I have make used of filter component of Mr. Valdutzan.

Can anyone explaine me the concept of STOP_BAND by using the LTspice?
Because the document explanation is not easy for me.

Shiggy

--- In LTspice@..., "amberwave" <rusty@...> wrote:

Helmut

Thanks so much for your reply.

Why didn't the counter also need a reset? Should it be in the real world?

If I understand you right, you must skip the initial operating point to allow a brief blip of positive voltage to reset the flip flop. Retaining the initial operating point would show only a zero voltage at the reset inputs.

In the real world isn't a flip flop reset when it first sees power?

Again thank you.

Rusty Hilliard

Hello Rusty,

The counter will need the reset signal at the beginning,
because the state of flipflops and counters isn't guaranteed
to be zero after power-up. Please notice that the capacitance
in the reset circuit has been increased. I recommend to use
a 6.2V Zener diode to have some reserve for the saturation
voltage of the transistor driving the relay.

Files > Temp > RIAA Timing Circuit1.zip

Best regards,
Helmut

--- In LTspice@..., "tomminnis" wrote:

I would like to start out with the built in Voltage source and
some how add an ideal current limiter using the included spice
primitives. Someone must have already figured this out.

LTspice's current source can do everything all by itself using the
TABLE variation. Here is an example of a 5V source with a 1m-ohm
output impedance and a hard current limit of 1 amp:

I1 0 1 Table(-5V,0A {1mV-5V},1A 0V,1A)

Note that because the current source arrow points up, positive
voltages must be designated as negative within the table.

Here is another example written using the default syntax (no
commas or unit labels). It also is of a 5V source with a 1m-ohm
output impedance, but its 1A current limit folds back to 0.1A:

I1 0 1 TBL(-5 0 {1m-5} 1 0 0.1)
C1 0 1 1mF Rpar=10k

It also has a 1,000 uF capacitor and 10k ohm bleeder resistor
added across it. The combination of a current source paralleled
with a capacitor is very convergence friendly in LTspice. -- a.s.

Helmut

Thanks so much for your reply.

Why didn't the counter also need a reset? Should it be in the real world?

If I understand you right, you must skip the initial operating point to allow a brief blip of positive voltage to reset the flip flop. Retaining the initial operating point would show only a zero voltage at the reset inputs.

In the real world isn't a flip flop reset when it first sees power?

Again thank you.

Rusty Hilliard

--- In LTspice@..., "imbvlad" <imbvlad@...> wrote:

Hello

In addition to the already mentioned solutions, you can try a diode with Vfwd=0 and Ilimit=X.

Hope this helps,
Vlad

This is exactly what I was looking for! A simple way to model the output of a typical lab supply where you can set a current limit and varry the Voltage and the load determins the current until you hit the threshold. Then it turns into a constant current source and the Voltage collalpses accordingly. Thanks for the tip!

Tom

--- In LTspice@..., "Helmut" <helmutsennewald@...> wrote:

--- In LTspice@..., "amberwave" <rusty@> wrote:

I forgot to mention I uploaded my circuit to the temporary folder.
R. Hilliard

Hello R.,

1.
First the CD4013 can't drive a load of 300Ohm.
2.
I added RESET-circuit for the first flipflop.
3.
This RESET-circuit only works with "uic".

.tran 60 uic

I replaced the missing transistors with parts from LTspice.

My uploaded zip-file include everything to RUN the simulation.

Files > Temp > RIAA Timing Circuit1.zip

Best regards,
Helmut

Hello,

The RESET has to be applied to both flipflops of course.

I have updated my uploaded zip-file.

Best regards,
Helmut

--- In LTspice@..., "amberwave" <rusty@...> wrote:

I forgot to mention I uploaded my circuit to the temporary folder.
R. Hilliard

Hello R.,

1.
First the CD4013 can't drive a load of 300Ohm.
2.
I added RESET-circuit for the first flipflop.
3.
This RESET-circuit only works with "uic".

.tran 60 uic

I replaced the missing transistors with parts from LTspice.

My uploaded zip-file include everything to RUN the simulation.

Files > Temp > RIAA Timing Circuit1.zip

Best regards,
Helmut

On 9/3/2012 2:38 PM, amberwave wrote:

Hello,
I am trying to simulate a timing circuit for a RIAA preamp that I am
building. I don't have much experience in the digital world but am
using a CD4040 and CD4013. I can get the counter to work but not the
CD4013. I thought that both the "set" and "reset" needed to be
grounded but that didn't work. I tried tying them to the 5V rail but
that didn't work either. I suspect that if I had more knowledge about
how these devices were modeled in LT Spice I could solve this myself.
I also tried using a 74HC74 but could not get that to work either.

The purpose of the circuit is to delay the application of high voltage
to the tubes followed shortly thereafter by unmuting the output stage.

I've been staring at this and reading a lot for the last 4 days. Any
help would be greatly appreciated.

R. Hilliard

__

The file you uploaded reports missing symbols( CD4040B, CD4013b.1 and
dView).

To get the CD4013 to work you need to look at a CD4013 truth table. See
<>

The truth table will tell you
When R = 0, S =0 and D = 0 then on the next rising edge of the clock
pulse Q = 0 and Qnot = 1
When R = 0, S =0 and D = 1 then on the next rising edge of the clock
pulse Q = 1 and Qnot = 0

Howard

I forgot to mention I uploaded my circuit to the temporary folder.
R. Hilliard

Hello,
I am trying to simulate a timing circuit for a RIAA preamp that I am building. I don't have much experience in the digital world but am using a CD4040 and CD4013. I can get the counter to work but not the CD4013. I thought that both the "set" and "reset" needed to be grounded but that didn't work. I tried tying them to the 5V rail but that didn't work either. I suspect that if I had more knowledge about how these devices were modeled in LT Spice I could solve this myself. I also tried using a 74HC74 but could not get that to work either.

The purpose of the circuit is to delay the application of high voltage to the tubes followed shortly thereafter by unmuting the output stage.

I've been staring at this and reading a lot for the last 4 days. Any help would be greatly appreciated.

R. Hilliard

Some of us designers do want to model behavior with a current-limited
supply. I do it this way....

** Current Limited Voltage Source **
.SUBCKT CLVS PLUS MINUS PARAMS: VDC=10 IMAX=100mA IDELTA=2mA
V_IM1 INT PLUS 0
E_EV INT MINUS VALUE { (TANH((I(V_IM1)-IMAX)/IDELTA)-1)/2*(-VDC) }
.ENDS CLVS
*

- Jim Thompson