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Re: Flip Flop and NAND gate
Hi all. Thank you for the feedback. I will study more about all the points that were raised. I had the idea of building a JK flip-flop circuit (after finishing the RS) using digital gates in LTspice,
By Guilherme Souza · #160659 ·
Re: Flip Flop and NAND gate
I have to ask, since I was not aware that Google's search function made such pronouncements.? Does this mean "According to an A.I., ..."? I think we know how far we should throw that one. Andy
By Andy I · #160658 ·
Re: Flip Flop and NAND gate
Well, that's not very sensible: an RS latch should e a reset-set latch. It's RS about-face. -
By John Woodgate · #160657 ·
Re: Flip Flop and NAND gate
Hello All: Just a tidbit. Google results: SR latch returns about 7,370,000 results. "S-R" latch returns about 9,390,000 results. The quotes are required to force Google to include the hyphen in the
By eewiz · #160656 ·
Re: Flip Flop and NAND gate
You are correct, Jim. I¡¯m only now being introduced to this topic in engineering school, so I don¡¯t yet have advanced knowledge. I will study the points you highlighted. Thank you.
By Guilherme Souza · #160655 ·
Re: TL074 model in 24.1.8
This underlines why it is always preferable to upload model files rather than paste them into messages, which often obscures the actual file contents. -- Regards, Tony
By Tony Casey · #160654 ·
Re: TL074 model in 24.1.8
The last one (1A = EOF) is the only one that matters to this.? CR/LF are OK. Some ADI employees are here, but by coincidence and this group is not a means of reporting bugs to them. Maybe they did
By Andy I · #160653 ·
Re: Flip Flop and NAND gate
We used to call them Master/Slave flip-flops, when they had one form of the extra logic to make them edge-triggered. Andy
By Andy I · #160652 ·
Re: TL074 model in 24.1.8
Turns out the last 3 characters are 0D 0A 1A so CR/LF/EOF Removing them works. I suspect ADI is aware as I found the fix on an ADI forum from ADI support. That said I don't know how to file a bug
By Hawker · #160651 ·
Re: Flip Flop and NAND gate
Hello All: Correct terminology matters. The OP has created a gated set-reset latch. A set-reset latch is not correctly termed a flip-flop. A set-reset latch is an integral part of a flip-flop but, a
By eewiz · #160650 ·
Re: Flip Flop and NAND gate
The OP needs to read about flip flops. RS flip flops are NOT edge sensitive. They are sensitive to which input is active LAST, Edge sensitive flip flops include D, JK, and others but NOT RS! RS flip
By Jim Wagner · #160649 ·
Re: Flip Flop and NAND gate
Not exactly.? This kind of flip-flop is level-sensitive, not edge-sensitive.? If I remember correctly (I might have this backwards), while the CLK is High, the state of the S and R inputs is
By Andy I · #160648 ·
Re: Flip Flop and NAND gate
Hello Andy I've updated my circuit take into consideration all feedbacks and It's working, but I would like to check with you the points below: 1. Can I configure which clock edge (rising or falling)
By Guilherme Souza · #160647 ·
Re: TL074 model in 24.1.8
This is, of course, before MS-Windows, where the Ctrl-Z keyboard action now means "Undo".? But I digress again. Andy
By Andy I · #160646 ·
Re: TL074 model in 24.1.8
By the way, I think the extra character is 0x1A (Hex(1A)), also known as Ctrl-Z. The Ctrl-Z character, or action, was often used to mean end-of-file.? A Ctrl-Z would occasionally be found within the
By Andy I · #160645 ·
Re: TL074 model in 24.1.8
This is a good one to report to Analog Devices.? Please do that. I'm not suggesting that SPICE models can or should get away with extra characters!? But if "tradition" has been that this particular
By Andy I · #160644 ·
Re: TL074 model in 24.1.8
Thank you this is super helpful. This confirmed the model is good and something else was wrong. So after googling " *Expected device instantiation or directive here.* " I found others with the same
By Hawker · #160643 ·
Re: LTspice 24
I see no reason why you can't just copy your auto-generated folder from your old library to the new one, there has been no change in file format that I'm aware. I have three versions of LTspice
By Tony Casey · #160642 ·
Re: Flip Flop and NAND gate
and then later added: Um, exactly what "suggested fixes" did you apply? I do not see any of the behaviour you described.? There is no triangle wave, and it definitely would not go to +5V.??The
Re: TL074 model in 24.1.8
These TL07x and TL08x models include 'node 0' in their netlists. You have to be careful if your circuit outside the model puts its 'node 0' elsewhere than what is required by the model. -- This email
By John Woodgate · #160640 ·