Re: TL074 model in 24.1.8
On Wed, May 28, 2025 at 10:33 AM, Hawker wrote:
Turns out, on older models, TI had some non printing character (alt code?) and a spare line feed at the end of their models. LT 24.0 didn't care, but 24.1 does care.
This is a good one to report to Analog Devices.? Please do that.
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I'm not suggesting that SPICE models can or should get away with extra characters!? But if "tradition" has been that this particular non-printing character at the end of a model file was previously accepted, and if they are prevalent in large numbers of downloadable SPICE models, then I think ADI ought to restore the previous LTspice behavior and accept those models too.
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When filing the bug report, make sure to include (attach) a few model files, unaltered by you, that illustrate the problem.
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Seems all the old stuff had this, but not the newer TI models.
Yes, especially for that reason.
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BTW, the extra line feeds are not a problem.? In fact I have sometimes seen the opposite happen, where a model ends with the last line of text and no carriage-return (or line-feed), which caused a SPICE program to not read that last line.? I never saw that happen in LTspice nor PSpice, bit it did happen with HSPICE.
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Someone should also kick ADI's behind about using such cryptic error messages.? Especially when "here" does not point to the problem.
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Andy
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Re: TL074 model in 24.1.8
Thank you this is super helpful.
This confirmed the model is good and something else was wrong.
So after googling "Expected device instantiation or directive here." I found others with the same problem and the solution.
Turns out, on older models, TI had some non printing character (alt code?) and a spare line feed at the end of their models. LT 24.0 didn't care, but 24.1 does care.
Deleting this character and the? the extra line feed from the model made this work. It also fixed other broken TI models I have.
Seems all the old stuff had this, but not the newer TI models.
?
thanx for the help.
On Tue, May 27, 2025 at 06:32 PM, bwolfe58 wrote:
I am using LTspice Version 24.1.8
?
I copied and pasted the TL074 model netlist into a schematic and used the opamp2 symbol renamed TL074. Added ¡À15V supplies and hooked it up as an inverting gain of -10 with two 10k resistors and it ran as expected.
?
Then I copied the model into a file and named it TL074.301(43) in the same directory with an ".inc TL074.301(43)" into the schematic. I commented out the netlist pasted into the schematic. It also ran.
?
Best Regards,
?
Burt
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On 28/05/2025 00:17, suded emmanuel via
groups.io wrote:
I installed V24.1, Both LTspices are working, I did not
upgrade, Yes, auto generated the symbols from 3rd party models,
I can still use them in old LTspice just like before
How do I use the auto generated symbols in LTspice 24.1 (if I
can)?
I have saved all the relevant models in a file on my desktop,
so I have backup, can I use the same symbols in LTspice 24.1 if
I copy and paste the auto generated symbols from old LTspice
XVII to LTspice 24.1 in the Autogenerated (in library) folder?
I see no reason why you can't just copy your auto-generated folder
from your old library to the new one, there has been no change in
file format that I'm aware.
I have three versions of LTspice installed. All of them are set up
to use the same libraries. Although (as far as I remember) LTspice
17 used ..\Documents\LTspiceXVII\lib by default for its library
folder, it also searches %APPDATA%\Local\LTspice\lib, if it exists.
So you could conduct an experiment by temporarily
renaming?..\Documents\LTspiceXVII\lib to -
say,?..\Documents\LTspiceXVII\lib.bak and checking if LTspice 17
still shows symbol libraries in the Component Chooser (F2). This is
useful because LTspice 17 will then use the new symbols and models
from LTspice 24, which is updated, whereas LTspice 17 isn''t.
--
Regards,
Tony
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Re: Flip Flop and NAND gate
On Tue, May 27, 2025 at 01:44 PM, Bell, Dave wrote:
After all of the suggested fixes, the FF is toggling nicely, BUT
Clk is running at 100kHz, but Q is outputting a 0-5V triangle wave at 78MHz
and then later added:
NO difference, slightly surprisingly to me, because Clk never crosses 50% of Vcc
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Um, exactly what "suggested fixes" did you apply?
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I do not see any of the behaviour you described.? There is no triangle wave, and it definitely would not go to +5V.??The output does not toggle, because its inputs are fixed levels (1 and 0).? In fact, the original circuit works pretty much as it should work - even if it was not what the author intended.
?
It is fairly simple, is it not?
- R is Low, therefore the output of A2 is High all the time.
- S is High, therefore the output of A1 is just an inverted copy of Clk (also level-shifted to 0V/1V levels).
- Every time the output of A1 goes Low, it forces Q to be High.
- With Q High, both inputs of A4 are High, so it forces Q/ to be Low.
- With Q' Low, it forces A3's inverted output (Q) High.
- Therefore, A3 and A4 latch themselves with Q High and Q/ Low.
And that's where it ends.? No matter what the Clk does, the outputs stay in that state.? They should not toggle.? If you want them to toggle, then the circuit needs to be different, or the S and R inputs should change.? eT's uploaded circuit fixes all that, but note that some of the attributes are hidden and you need to right-click on each of the NAND gates to see them.
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What was missing here was a little delay in the gates.? And the only consequence of that, in this simulation, is that LTspice was unable to find the initial DC operating point.? So it skipped that and began the transient analysis with an "unknown" state (like using ".tran ... UIC"), but that very quickly gets resolved at the first datapoint of the transient analysis.? It is a latch, after all, so it is happy to stay latched once it knows which way to go.
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By adding a little delay to either A3 or A4 or both, that problem is eliminated and even the initial operating point is defined.? But it doesn't change the waveforms.
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The original question was "Q output doesn¡¯t match the truth table of this flip-flop."? Unfortunately, guilhermesouzam01 has not been back here yet, and I don't know if she/he found an answer already or is still waiting for one.? I do not see any mismatch as far as the truth table is concerned.? With S=1 and R=0, I think the outputs are exactly what they are supposed to be.? ?Note some versions of the S/R flip-flop use AND gates for the first two gates and NAND gates for the second two, which gives you a different truth table.? Maybe that's what you were looking at?
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Andy
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Re: TL074 model in 24.1.8
These TL07x and TL08x models include 'node 0'
in their netlists. You have to be careful if your circuit
outside the model puts its 'node 0' elsewhere than what is
required by the model.
On 2025-05-27 23:32, bwolfe58 via
groups.io wrote:
I am using LTspice Version 24.1.8
?
I copied and pasted the TL074 model netlist into a schematic
and used the opamp2 symbol renamed TL074. Added ¡À15V supplies
and hooked it up as an inverting gain of -10 with two 10k
resistors and it ran as expected.
?
Then
I copied the model into a file and named it TL074.301(43)
in the same directory with an ".inc TL074.301(43)"
into the schematic. I commented out the
netlist pasted into the schematic. It
also ran.
?
Best
Regards,
?
Burt
--
Best wishes John Woodgate RAYLEIGH Essex OOO-Own Opinions Only
If something is true: * as far as we know - it's science *for
certain - it's mathematics *unquestionably - it's religion
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Re: TL074 model in 24.1.8
On Tue, May 27, 2025 at 06:32 PM, bwolfe58 wrote:
Then I copied the model into a file and named it TL074.301(43) ...
Just a little FYI - The filename that Hawker used actually was "TL074.301".
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The "(43)" is an error code from LTspice.? It was rather bad of them (ADI) to append the error message onto the end of the filename.? Just pretend that there is a line-feed between "TL074.301" and "(43)".
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But regardless, I think you may have proven that it works.? It seems somewhat likely that Hawker had some other mistake that caused their error.
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Andy
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Re: TL074 model in 24.1.8
I am using LTspice Version 24.1.8
?
I copied and pasted the TL074 model netlist into a schematic and used the opamp2 symbol renamed TL074. Added ¡À15V supplies and hooked it up as an inverting gain of -10 with two 10k resistors and it ran as expected.
?
Then I copied the model into a file and named it TL074.301(43) in the same directory with an ".inc TL074.301(43)" into the schematic. I commented out the netlist pasted into the schematic. It also ran.
?
Best Regards,
?
Burt
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On Tue, May 27, 2025 at 06:17 PM, suded emmanuel wrote:
I have saved all the relevant models in a file on my desktop, so I have backup, can I use the same symbols in LTspice 24.1 if I copy and paste the auto generated symbols from old LTspice XVII to LTspice 24.1 in the Autogenerated (in library) folder?
Yes.? ?LTspice symbols are the same, and LTspice schematics are the same.? They didn't change.? You just have a case where the new installation does not know where your old custom symbols were.
?
You can copy them from the old library into the new "AutoGenerated" library folder.
?
Or alternatively, copy them into the directories that hold your schematics that need them.
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But please be aware that every one of those AutoGenerated symbols (unless you modified them) links to its model file location at the time you AutoGenerated the symbol.? If you ever move that model file, it won't work anymore.? Where were those model files?? It might have been in the model library of your pre-24.1 version of LTspice.? That won't change.? And if you ever delete or rename your old library area, you'll be screwed.
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It is one of the reasons not to AutoGenerate symbols - unless you know what you're doing and are vigilant about fixing them.
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Andy
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Hi Tony,
I will try to drop the habit of using Autogenerated symbols! this process is much easier now in Qspice you have it all within the file!
I'm just trying to use the older models that I have in LTspice 24.1 to see if the simulation runs faster!
Regards,
Suded
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Hi Tony,
I installed V24.1, Both LTspices are working, I did not upgrade, Yes, auto generated the symbols from 3rd party models, I can still use them in old LTspice just like before
How do I use the auto generated symbols in LTspice 24.1 (if I can)?
I have saved all the relevant models in a file on my desktop, so I have backup, can I use the same symbols in LTspice 24.1 if I copy and paste the auto generated symbols from old LTspice XVII to LTspice 24.1 in the Autogenerated (in library) folder?
Regards,
Suded
|
It seems that there has to be a 'newline'
character (ASCII 12) before the + in order for it to be
accepted.
On 2025-05-27 22:47, Andy I via
groups.io wrote:
On Thu, May 22, 2025 at 07:04 PM, Hawker wrote:
C:\Users\{user}\Documents\LTspice\user.jft(1): Syntax
error (unexpected input).
.MODEL 2N5457 NJF(VTO=-1.8 BETA=0.00135 LAMBDA=0.001 RD=35
RS=31.5 + CGS=2.25E-12 CGD=6E-12 KF=6.5E-17 AF=0.5 )
? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?
? ? ? ? ? ? ? ? ? ? ? ? ?? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?
? ? ? ? ?? ^^^^^^^^^
It appears that older versions of LTspice accepted that errant
plus sign (+) in the middle of the .MODEL statement, which
should not have been there.? But the latest version rejects it
and tells you that it is wrong.
?
Some might argue that LTspice should have rejected it all
along, or at the least should have issued a Warning message.?
But it is not that simple, because SPICE syntax always was a
little loose, allowing some things which
should not be there.? Extra parentheses sometimes do not matter
when they are found in SPICE Netlists (with exceptions).? But a
random misplaced plus sign where it does not belong?? Some would
say it is a no-no.
?
One could argue either way.? Which is a way of saying that
you could try suggesting to Analog Devices that
LTspice version 24.1.x should not reject that line for that
reason.? But you have nothing to stand on.? As far as I know,
there never was anything in SPICE's history that says plus signs
can be inserted randomly in Netlists with no consequence.
?
My personal feeling is the plus sign should not be allowed
there, and an error or warning was appropriate.
?
Andy
?
?
--
Best wishes John Woodgate RAYLEIGH Essex OOO-Own Opinions Only
If something is true: * as far as we know - it's science *for
certain - it's mathematics *unquestionably - it's religion
|
On Thu, May 22, 2025 at 07:04 PM, Hawker wrote:
C:\Users\{user}\Documents\LTspice\user.jft(1): Syntax error (unexpected input).
.MODEL 2N5457 NJF(VTO=-1.8 BETA=0.00135 LAMBDA=0.001 RD=35 RS=31.5 + CGS=2.25E-12 CGD=6E-12 KF=6.5E-17 AF=0.5 )
? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?? ^^^^^^^^^
It appears that older versions of LTspice accepted that errant plus sign (+) in the middle of the .MODEL statement, which should not have been there.? But the latest version rejects it and tells you that it is wrong.
?
Some might argue that LTspice should have rejected it all along, or at the least should have issued a Warning message.? But it is not that simple, because SPICE syntax always was a little loose, allowing some things which should not be there.? Extra parentheses sometimes do not matter when they are found in SPICE Netlists (with exceptions).? But a random misplaced plus sign where it does not belong?? Some would say it is a no-no.
?
One could argue either way.? Which is a way of saying that you could try suggesting to Analog Devices that LTspice version 24.1.x should not reject that line for that reason.? But you have nothing to stand on.? As far as I know, there never was anything in SPICE's history that says plus signs can be inserted randomly in Netlists with no consequence.
?
My personal feeling is the plus sign should not be allowed there, and an error or warning was appropriate.
?
Andy
?
?
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Re: Flip Flop and NAND gate
On Tue, May 27, 2025 at 09:21 AM, <guilhermesouzam01@...> wrote:
Hello All!
?
I¡¯m trying to create an SR flip-flop circuit with a clock in LTspice. To do this, I¡¯m using the AND logic gate available under Component/Digital. I¡¯m assuming it provides two output options: normal and inverted. Therefore, I¡¯m using the inverted output to form a NAND gate.
However, it¡¯s not working. My Q output doesn¡¯t match the truth table of this flip-flop.
Could someone guide me? I¡¯ve never created a digital circuit in LTspice before.
I¡¯ve attached the FlipFlop_SR_Clock circuit in Temp.
Thank you!
I've uploaded a corrected version.
FlipFlop_SR_Clock_eT.zip
?
Also posted a photo
?
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Re: TL074 model in 24.1.8
I hope we will soon get a long-term stable
version, not too many versions ahead.
On 2025-05-27 21:16, eetech00 via
groups.io wrote:
On Tue, May 27, 2025 at 11:13 AM, Hawker wrote:
Worked in 24.0.x, does not work in 24.1.8
Works fine in 24.1.9
?
eT
--
Best wishes John Woodgate RAYLEIGH Essex OOO-Own Opinions Only
If something is true: * as far as we know - it's science *for
certain - it's mathematics *unquestionably - it's religion
|
Re: TL074 model in 24.1.8
On Tue, May 27, 2025 at 11:13 AM, Hawker wrote:
Worked in 24.0.x, does not work in 24.1.8
Works fine in 24.1.9
?
eT
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Re: TL074 model in 24.1.8
Looks like the problem is not about what's inside the model.
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The error message is cryptic, but suggests something like a wrong file being called.
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Andy
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Re: Flip Flop and NAND gate
Clk doesn't need to cross 50% of Vcc.? Just needs to cross the ref input voltage of the A-devices, which is 0.5 V unless changed.
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Andy
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Re: Flip Flop and NAND gate
Until the first clock edge, the output is undefined, and just oscillates.
After all of the suggested fixes, the FF is toggling nicely, BUT
Clk is running at 100kHz, but Q is outputting a 0-5V triangle wave at 78MHz
?
Dave
?
?
also, I see you have a 5V clock signal, but are using 0/1 V levels for S and R signals. A-type elements (i.e., logic gates) default to 0/1 V logic levels.? Read about A-type elements in help. Finally, propagation delay is set with the Td
parameter.
?
add propagation delay to each digital logic element. then see what happens.
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Ok so y'all caught an ancient 5457 model bug, that worked non the less before 24.1.x. Can you tell me what is wrong with the ancient TI TL074 model that has worked (though limited) forever until now?
?
Worked in 24.0.x, does not work in 24.1.8
I have
.include TL074.301
Just like all the other models.
I get the error
C:\Users\{USER}\Documents\LTspiceXVII\lib\sub\TL074.301(43): Expected device instantiation or directive here.
^
All other TI included models so far work.
Model looks like this
* TL074 OPERATIONAL AMPLIFIER "MACROMODEL" SUBCIRCUIT
* CREATED USING PARTS RELEASE 4.01 ON 06/16/89 AT 13:08
* (REV N/A) ? ? ?SUPPLY VOLTAGE: +/-15V
* CONNECTIONS: ? NON-INVERTING INPUT
* ? ? ? ? ? ? ? ?| INVERTING INPUT
* ? ? ? ? ? ? ? ?| | POSITIVE POWER SUPPLY
* ? ? ? ? ? ? ? ?| | | NEGATIVE POWER SUPPLY
* ? ? ? ? ? ? ? ?| | | | OUTPUT
* ? ? ? ? ? ? ? ?| | | | |
.SUBCKT TL074 ? ?1 2 3 4 5
*
? C1 ? 11 12 3.498E-12
? C2 ? ?6 ?7 15.00E-12
? DC ? ?5 53 DX
? DE ? 54 ?5 DX
? DLP ?90 91 DX
? DLN ?92 90 DX
? DP ? ?4 ?3 DX
? EGND 99 ?0 POLY(2) (3,0) (4,0) 0 .5 .5
? FB ? ?7 99 POLY(5) VB VC VE VLP VLN 0 4.715E6 -5E6 5E6 5E6 -5E6
? GA ? ?6 ?0 11 12 282.8E-6
? GCM ? 0 ?6 10 99 8.942E-9
? ISS ? 3 10 DC 195.0E-6
? HLIM 90 ?0 VLIM 1K
? J1 ? 11 ?2 10 JX
? J2 ? 12 ?1 10 JX
? R2 ? ?6 ?9 100.0E3
? RD1 ? 4 11 3.536E3
? RD2 ? 4 12 3.536E3
? RO1 ? 8 ?5 150
? RO2 ? 7 99 150
? RP ? ?3 ?4 2.143E3
? RSS ?10 99 1.026E6
? VB ? ?9 ?0 DC 0
? VC ? ?3 53 DC 2.200
? VE ? 54 ?4 DC 2.200
? VLIM ?7 ?8 DC 0
? VLP ?91 ?0 DC 25
? VLN ? 0 92 DC 25
.MODEL DX D(IS=800.0E-18)
.MODEL JX PJF(IS=15.00E-12 BETA=270.1E-6 VTO=-1)
.ENDS
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Tony Casey
John Woodgate
Bell, Dave