Re: Simulation runs very slowly: test.asc
It’s unclear to me which of the four separate circuits you are referring to, or why you are suggesting a reconfiguration and what goal you are pursuing. All are configured as I intended. They are independent of one another except for sharing a power supply. ? The purpose of the schematic is to try to isolate the aspect of the right-most circuit (which is the one I’m really interested in) which is causing the simulation problem. Although we still don’t know, the simulation completes and runs (acceptably) slowly with Andy’s suggestion of the alternate solver. ?
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From: [email protected] <[email protected]> On Behalf Of eetech00 via groups.io
Sent: Monday, March 31, 2025 7:59 PM
To: [email protected]
Subject: Re: [LTspice] Simulation runs very slowly: test.asc? I haven't tried this but, then the anode of the top diode should connect to the LM317 current regulator output and the mosfet drain should connect to the cathode of the bottom diode in the string(?)
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Re: Simulation runs very slowly: test.asc
Just a FYI:
Threaded discussion list view can be enabled in other email clients
besides Thunderbird, including Gmail, Kmail, Outlook and Windows
Mail. In Gmail, Outlook and Windows Mail it is called "Conversation"
view, but it needs configuring in most clients and is best used when
filters or rules are applied to your inbox(es) to move certain
messages to other folders.
--
Regards,
Tony
On 31/03/2025 02:13, Andy I via
groups.io wrote:
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It won't affect
most of you, and it does not change the problem that it hijacked
another topic.? Sorry to you Thunderbird email users, but we are
stuck with that.
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Re: Simulation runs very slowly: test.asc
On Mon, Mar 31, 2025 at 07:59 PM, eetech00 wrote:
I haven't tried this but, then the anode of the top diode should connect to the LM317 current regulator output and the mosfet drain should connect to the cathode of the bottom diode in the string(?)
I think that would not make sense, because there's about a 100 to 1 difference in the two current limiters.
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The op-amp+MOSFET part is a (logical) input into the '317 regulator.? NOT meant to drive the diode load, and it does not drive the diodes at all.
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Andy
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Re: Simulation runs very slowly: test.asc
I haven't tried this but, then the anode of the top diode should connect to the LM317 current regulator output and the mosfet drain should connect to the cathode of the bottom diode in the string(?)
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Re: Simulation runs very slowly: test.asc
The op-amp+FET sinks?current downwards.
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The LM317A sources current to the diodes, plus the FET.? They don't compete.
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There are 2 orders of magnitude difference between the two current regulators.
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I think the FET sink sets the drop across a resistor, 'tuning' the much greater current regulated by the '317.
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Andy
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Re: Simulation runs very slowly: test.asc
Andy found that the Alternate Solver is a solution, although the simulation run is anything but lightning-fast. He posits that some form of very high frequency (numerical) oscillation is slowing things down. ?
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From: [email protected] <[email protected]> On Behalf Of eetech00 via groups.io
Sent: Monday, March 31, 2025 6:59 PM
To: [email protected]
Subject: Re: [LTspice] Simulation runs very slowly: test.asc? On Mon, Mar 31, 2025 at 02:14 PM, Christopher Paul wrote: eetech00, I’m afraid I don’t understand. ? From what I can see, each of the three diode strings is driven by a single current regulator. Maybe you could you describe your concerns using component reference designators? ?
You have three groups of circuits, but I'll refer to one group. The opamp and mosfet forms a basic Volt to current converter and its controlling current thru the diodes. The LM317 is also configured as a current regulator and it also (trying) control current thru the diodes. That's what I think is causing the simulation convergence problems.
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Re: Simulation runs very slowly: test.asc
On Mon, Mar 31, 2025 at 02:14 PM, Christopher Paul wrote:
eetech00, I’m afraid I don’t understand.
?
From what I can see, each of the three diode strings is driven by a single current regulator. Maybe you could you describe your concerns using component reference designators?
?
?
?
You have three groups of circuits, but I'll refer to one group.
The opamp and mosfet forms a basic Volt to current converter and its controlling current thru the diodes.
The LM317 is also configured as a current regulator and it also (trying) control current thru the diodes.
That's what I think is causing the simulation convergence problems.
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Re: Simulation runs very slowly: test.asc
eetech00, I’m afraid I don’t understand. ? From what I can see, each of the three diode strings is driven by a single current regulator. Maybe you could you describe your concerns using component reference designators? ?
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From: [email protected] <[email protected]> On Behalf Of eetech00 via groups.io
Sent: Monday, March 31, 2025 4:58 PM
To: [email protected]
Subject: Re: [LTspice] Simulation runs very slowly: test.asc? The circuit run fine if its connected correctly. The way it is connected, the two current regulators are in conflict with each other, since they are both trying to regulate current to the same load (the diodes). Use two separated current loads, one for each regulator.
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Re: Simulation runs very slowly: test.asc
Chris
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The circuit run fine if its connected correctly.
The way it is connected, the two current regulators are in conflict with each other, since they are both trying to regulate current to the same load (the diodes). Use two separated current loads, one for each regulator.
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Hello everyone,
First of all, I appreciate your comments, suggestions, and circuits. I am reading the papers and will simulate what you suggested. I work in a laboratory where we are characterizing some biological samples, and they exhibit Memristor-like behavior or something similar.
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A new file has been uploaded: ? ? ? ? ? ? ? ? ? ? ?Negative_Resistance_Ckt.asc.zip ? ? ? ? ??? This is a generic (architectural) schematic with no component values but it IS an LTspice file. Pick a zener (typically around 5V), an NPN transistor (I use 2N3904), a PNP transistor (I use 2N3906), ?I use a few KOhm for R1, R2, R3, R4. ?I use a few hundred ohms for R5. R4 should not be so large that Q1 saturates at peak current. Avoid reverse base-emitter breakdown of Q1 at maximum input voltage. ?
Jim Wagner
Oregon Research Electronics
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So, sorry - that drawing has been bad for lots of years! ?Q2 should be PNP! ?I will correct it. Don't want bad stuff out there. Should I remove the incorrect post?
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Jim
On 03/31/2025 5:56 AM PDT Andy I via groups.io <ai.egrps+io@...> wrote:
?
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On Sat, Mar 29, 2025 at 09:38 PM, Jim Wagner wrote:
I think I have the circuit you need. It is circa-1965 and uses 3-4 bipolar transistors, a zener diode, and a handful of resistors. ...
Jim,
?
Your schematic in the photo you uploaded shows two NPN transistors, but the description that accompanies it mentions "2N3904/6" which implies that one of them is a PNP.? I have not tried (nor studied the circuit in detail), but I wondered if Q2 is supposed to operate in reverse breakdown mode so it is an NPN, or if it was supposed to be a PNP.
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Did you draw that schematic, or was it originally drawn with two NPNs, and is one of them wrong?
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Andy
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Re: Simulation runs very slowly: test.asc
A correctly made model would not care whether the voltages are +/-15, or +30, or (+20 & -10) volts.? It's all just relative.? From the op-amp's perspective, the only difference is where the external ground voltage happens to be.
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Of course there are badly constructed SPICE models too, that do the wrong thing.? Hopefully those are few now.
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Andy
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Re: Simulation runs very slowly: test.asc
I was considering the 15 V unbalance, not the
absolute values. But it was just a guess. A generic model would
probably not show that, or not work at all.
On 2025-03-31 13:31, Andy I via
groups.io wrote:
On Mon, Mar 31, 2025 at 05:13 AM, John Woodgate wrote:
It might not be so good
with +20V and -5V rails. I doubt that is tested.
I noticed that the generic SPICE macromodel for the ADA4084
states that it was tested only with 30V (+/-15V) supplies.
?
The built-in LTspice model does not say.? But I would hope
that it works ALMOST the same with 25 V as it does with 30 V
rails.? The part's datasheet has extensive data for 3, 10, and
30 V rails.
?
?
--
OOO - Own Opinions only
If something is true:
* as far as we know - it's science
*for certain - it's mathematics
*unquestionably - it's religion
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On Sat, Mar 29, 2025 at 09:38 PM, Jim Wagner wrote:
I think I have the circuit you need. It is circa-1965 and uses 3-4 bipolar transistors, a zener diode, and a handful of resistors. ...
Jim,
?
Your schematic in the photo you uploaded shows two NPN transistors, but the description that accompanies it mentions "2N3904/6" which implies that one of them is a PNP.? I have not tried (nor studied the circuit in detail), but I wondered if Q2 is supposed to operate in reverse breakdown mode so it is an NPN, or if it was supposed to be a PNP. ?
Did you draw that schematic, or was it originally drawn with two NPNs, and is one of them wrong?
?
Andy
?
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Re: creating PNP caracteristicsby sweeping plot in LTspice from a circuit I built
Sorry, I also should have said this:? Ground the Emitter and connect the negative collector voltage source to the transistor's collector.
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Obviously, the graph you uploaded needs to be inverted (or plotted with negative voltages going right and negative currents going up) when using a PNP.
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Andy
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Re: creating PNP caracteristicsby sweeping plot in LTspice from a circuit I built
On Mon, Mar 31, 2025 at 07:27 AM, john23 wrote:
Is a there a way by clever type of sweep to recreate the basic characteristics plot of the attached PNP plot?
Sweep the collector voltage.
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Sweep the base current over a number of steps.
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Do not do this as a .TRAN simulation.
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In your circuit, remove R1, R2, and R3.? Replace V1 with a current source.
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Use one .DC command that specifies two sources.? If I remember correctly, the "1st Source" should be the collector voltage, and the "2nd Source" should be the base current.? Sweep the collector voltage with fine increments (0.1 V or smaller), and sweep the base current over a smaller number of steps (0.2 uA increments).
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Andy
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Re: Simulation runs very slowly: test.asc
Andy, ? Thanks again for all your help and suggestions. And yes, test.asc is just that – a schematic for testing the circuit in another schematic. The schematic I didn’t post was the one I was commenting on. ? Sorry, busy day.
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From: [email protected] <[email protected]> On Behalf Of Andy I via groups.io
Sent: Monday, March 31, 2025 12:43 AM
To: [email protected]
Subject: Re: [LTspice] Simulation runs very slowly: test.asc? Analog Devices has another SPICE model for the ADA4084, downloadable from the part's webpage.? The model that comes with LTspice has elements that require LTspice.? The downloadable model is generic SPICE.? They were likely created by different people at ADI. I tried it in your circuit. It seems to "work" with either Solver, with or without a 10K pulldown resistor at the output.? However, it is rather slow using the Normal Solver.? It's not nearly as slow as your circuit was.? It makes slow but steady progress.? Also there are glitches, so something (an oscillation?) seems to be going on. With the Alternate Solver, it takes a few seconds to find the initial operating point, but then it simulates the rest in the blink of an eye, and I see no glitches in the waveform. These are interesting results, but puzzling.
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Re: Simulation runs very slowly: test.asc
On Mon, Mar 31, 2025 at 05:13 AM, John Woodgate wrote:
It might not be so good with +20V and -5V rails. I doubt that is tested.
I noticed that the generic SPICE macromodel for the ADA4084 states that it was tested only with 30V (+/-15V) supplies.
?
The built-in LTspice model does not say.? But I would hope that it works ALMOST the same with 25 V as it does with 30 V rails.? The part's datasheet has extensive data for 3, 10, and 30 V rails.
?
?
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On Mon, Mar 31, 2025 at 03:26 AM, jacfev wrote:
I tried to simulate a negative resistance using btdeboi's netlist, but I can't complete the schematic.
Can you help me complete it ?
See Negative Conductance.asc
Compared to the netlist in btdeboi's?message, there is one omission in your schematic.? Change the formula of the B-source B1, from this:
I = V(Vi,Vo)/R
to this:
I = V(Vi,Vo)/V(Vr)
That's all I can tell you because it is missing a SPICE simulation command (.OP or .DC or .AC or .TRAN?) and I don't know where/why it works.? I guess you need to work that out.
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If you sweep the voltage source V1 (.DC V1 ...), the current through B1 and Rmeas linearly decreases as V(Vi) increases.
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Andy
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Tony Casey
John Woodgate