LTspice@groups.io

Locked schematic files will not copy

Hello, have not posted here for quite a while!

I have a number of schematic files that have a small lock icon just to the left of them when I display the files in a folder. When I select all the files and drag them into a USB memory stick folder, only the unlocked files copy across. Any idea what I am doing wrong?

Thanks

Re: inductance with a permeability in dependency of frequency

#64785

--- In LTspice@..., Andy <Andrew.Ingraham@...> wrote:

Herbert (<afu@...>) wrote:

Is it possible to give LTSPICE a value by a formula expression based on
a table ( interpolation???) ?
Yes you can.  But the problem is that it tends to work well in .AC analysis
but not in .TRAN analysis.

Also, many inductive devices with iron-based cores are nonlinear, which
makes them difficult (impossible) to quantify in the frequency domain alone.

AndyAndy,

Nonlinear inductor work fine in the frequency domain.  The first thing LTspice does for an .AC analysis is to find the DC operating point.  Then any nonlinear devices are linearized at their operating point.  .AC analysis, by definition, is a small signal linear analysis and it does not deal with nonlinear devices other than noted above.

Rick

Re: Is it possible to link several symbols to the same package?

#64784

--- In LTspice@..., "highfidelityinc" <steve54@...> wrote:

Forgive me for asking such a basic question but is it possible to link several symbols (e.g. *.asy files) to the same package?  I mean, say I have a quad opamp.  I would like to position each of the 4 opamp individually on the schematic and maybe the power and ground to a separate symbol.  Then when I export the Netlist to draw the PC layout, they are all assigned to the same package.

Currently I just make one big symbol with all four opamps and power and ground.  But by doing that I cannot lay out my schematic as clearly without creating a rat nest of interconnecting wires.

Many thanks for your advice.
Steve

Hello Steve,

You could name the opamps U4A, U4B, U4C, U4D and do some
extra post-processing to modify the PCB-netlist.

Maybe this earlier discussion will help.

"pcb layout s/w for use with ltspice"

It starts with message #52018 and ends with the interesting
message/offer #52082 from Peter.

Best regards,
Helmut

Is it possible to link several symbols to the same package?

#64783

Forgive me for asking such a basic question but is it possible to link several symbols (e.g. *.asy files) to the same package?  I mean, say I have a quad opamp.  I would like to position each of the 4 opamp individually on the schematic and maybe the power and ground to a separate symbol.  Then when I export the Netlist to draw the PC layout, they are all assigned to the same package.

Currently I just make one big symbol with all four opamps and power and ground.  But by doing that I cannot lay out my schematic as clearly without creating a rat nest of interconnecting wires.

Many thanks for your advice.
Steve

Re: inductance with a permeability in dependency of frequency

#64782

Hi Andy,

as the game plays in the RF ham area, the AC view will be the right way !

I will try to find out, how it will work with the a table .

Thanks

Herbert

Am 14.07.2013 18:08, schrieb Andy:

Show quoted text

 

Herbert (<afu@... <mailto:afu%40hws-electronic.com>>)
wrote:

Is it possible to give LTSPICE a value by a formula expression based on
a table ( interpolation???) ?
Yes you can. But the problem is that it tends to work well in .AC analysis
but not in .TRAN analysis.

Also, many inductive devices with iron-based cores are nonlinear, which
makes them difficult (impossible) to quantify in the frequency domain
alone.

Andy

Re: inductance with a permeability in dependency of frequency

John Woodgate

#64781

In message <krbus2+ba2e@...>, dated Sun, 7 Jul 2013, Herbert <afu@...> writes:

dows anybody have an idea for modelling a inductance with a permeability in dependency of frequency ??I want to go right back to the beginning. Because you gave very little information, people have assumed various things and that can make the whole thing complex and confusing.

First of all, what frequency range are we in, and what is the material whose permeability depends on frequency?  Secondly, is this material significantly lossy in that frequency range or not?

For example, if you are looking at nickel-iron at audio frequencies, the losses are secondary, but if you are looking at ferrites at radio frequencies, then whether the losses are significant or not depends on which grade of ferrite you are looking at.

If the losses are NOT significant, then why bother with permeability? The inductance is proportional to it, so you can just use a table of inductance against frequency.

If the losses ARE significant, you CAN model as L and R parallel but both need a table of values against frequency.
-- 
OOO - Own Opinions Only. See www.jmwa.demon.co.uk
Why is the stapler always empty just when you want it?

John Woodgate, J M Woodgate and Associates, Rayleigh, Essex UK

Re: inductance with a permeability in dependency of frequency

#64780

Herbert (<afu@...>) wrote:

Is it possible to give LTSPICE a value by a formula expression based on
a table ( interpolation???) ?
Yes you can.  But the problem is that it tends to work well in .AC analysis
but not in .TRAN analysis.

Also, many inductive devices with iron-based cores are nonlinear, which
makes them difficult (impossible) to quantify in the frequency domain alone.

Andy

Re: Locked files

John Woodgate

#64779

In message <krufd8+qauu@...>, dated Sun, 14 Jul 2013, jason. vanryan <andrewc.russell@...> writes:

I am trying to copy  my circuit files from one computer to another. Some of the files have a little lock icon next to them. These files will not copy across to a USB drive. If I open them individually and then save them to the USB drive its ok.

What am I doing wrong?
You have probably got your files in C:&#92;Program Files&#92;... and Windows will not let you copy files from there to another computer.
-- 
OOO - Own Opinions Only. See www.jmwa.demon.co.uk
Why is the stapler always empty just when you want it?

John Woodgate, J M Woodgate and Associates, Rayleigh, Essex UK

Locked files

#64778

Hello,

I am trying to copy  my circuit files from one computer to another. Some of the files have a little lock icon next to them. These files will not copy across to a USB drive. If I open them individually and then save them to the USB drive its ok.

What am I doing wrong?

Re: inductance with a permeability in dependency of frequency

#64777

Hi Alzie   and aall the others which answered,

Alzie is nearly right with the way of explanation what I have seen, but
it is not possible to describe the behaviour by S?ICE just with a
parallel resistor.
On that page         under B you will
find a real measured Z-Plot in vetorial notation ( with the phase on the
right side ) and the initial measurement of inductivity of 20uH. The
core is lossy in the range of the plot ( Amidon  Mat 43) and the model
with jus the parallel resistance does NOT do enough or right. So my idea
was to define the permeability in its complex form and give a table of
values or artificaly evaluated polynom with permeabilty factors over
frequency.

Is it possible to give LTSPICE a value by a formula expression based on
a table ( interpolation???) ?

Thanks in advance

Herbert


Am 09.07.2013 14:48, schrieb alzie:


Hi Herbert

On 07/09/2013 12:45 AM, sawreyrw wrote:
dows anybody have an idea for modelling a inductance with a
permeability in dependency of frequency ??A simple model would be an inductor in parallel with a resistor.

Most ferrous cores behave well up to a cross over frequency at which
the perm drops and they become very lossy.
The loss dominates above that freq and
the inductor looks pretty much like a resistor that
is flat with freq.

--

AC2CL

I do not think there is any thrill that
can go through the human heart like that felt by the inventor as
he sees some creation of the brain unfolding to success...
Such emotions make a man forget food, sleep, friends, love, everything.

- Nikola Tesla





[Non-text portions of this message have been removed]

Re: Help! How do I do find maximum signal easily!

#64776

--- In LTspice@..., Macy <macy@...> wrote:

still requires a LOT of fussing around.

bouncing between wide band .noise and 'regular' .ac analysis and the .ac using specific values requires storing on the schematic a list so long that it makes the schematic the size of a postage stamp in auto size. perhaps a plus sign on the first of a few lines will allow wordwrap - narrow width with long list.

getting an output requires click file, export, then select real, imaginary ofrmat, and then YES overwrite existing *.txt file.

Then run a script in octave to grab all the data, do the conversion to something meaningful and evaluate whether I did what I wanted to.

But, other than all this mucking about, I CAN get my answers!! whew! it gets me there.

Are you talking about GNU Octave and are you working under windows or linux?
If you are working under linux then you may be able to write a netlist for ngspice. You would then be able to run  all your analysis commands together between control statements, e.g:

.control
all analysis statements here
.endc

More examples here:

But then you would have to post on a ngspice forum.

Re: arbitrary solar cell model

#64775

Dear Andy and Dear Fred

Firstly, I really cannot explain my feelings when I see that you do your best for to solve my problem, I thank you very much.
Couple of days ago, I was in vacation and I was thinking that the problem can be from Voc and Isc calculators and actually when I separate the Evoc and Eisc from the main circuit and just grounded them, the distortion disappeared but again it is not working for 2 cells in series while by making two cells in series the open circuit voltage should be doubled which is not happening (it was happening before I separate the calculators but with distortion) !
For making the things more clear, I draw the circuit in Paint ( so ashamed that cannot work with schematics and SPICE good).

and corrected circuit

But solving this issue is a real challenge for me ! maybe there is only a mistake on nodes ! while it works in parallel not in series !

Again I should say that I really appreciate your helps so far thank you thank you and thank you again.

Kind regards
Hamed

Show quoted text

--- In LTspice@..., "qrx3" <fredh@...> wrote:

Hello Hamed,

I had a chance to look at this a bit more closely, and I do think LTspice is having a problem with this circuit that it should not have.  I have created a simpler version of your circuit, in schematic form, and placed it in the Temp directory.  The file is "BadExp.asc."  If you run it as-is the simulator fails to find a reasonable solution, voltages and currents that should be in the single-digits are in the 100ks or Megs, not where they should be.  However if you change the simulation command to start the DC sweep at 0V instead of -1V it works fine.  This is what I saw with your circuit too, I think having two cells in series might have caused the simulator, at some point in its search, to have a negative voltage on one of the cells, and everything blew up.  It seems that LTspice tries to use the results of each iteration to start the next iteration, so once it's gone off the rails it stays there.  But it really shouldn't be having any problem calculating the solution with negative input voltages.

Another way to 'fix' the problem is to force the B-source for Voc to a constant value of 0.564V.  This is odd since even when the sim fails that B-source has that correct value on it, while the Bidiode source blows up.

I have sent this circuit and observation to Mike @ LT, I'll report back here when I hear from him.

--- In LTspice@..., "hamed" <l0st_l0rd@> wrote:
the reason that I use arbitrary model not a standard diode is that I cannot control temperature change for each solar cell in diode model.But as you've been told this is not true.  You -can- control the temperature independently for each instance.  What's more, the standard model will have the correct temperature dependence while you  already know that your equations do not calculate Voc correctly over temperature.

--- In LTspice@..., "hamed" <l0st_l0rd@> wrote:
Furthermore, the reason that grounds are different is that two cells are in series.Yes, I understand why you want your model to float so you can connect them without reference to ground, but as I said you did not implement this correctly.  Your formulas for Voc and Isc are referenced to the 'ref' node but then when you use those values in the subsequent calculations you are using their value relative to ground.  This is wrong.

Actually I should say that I am not so good in schematics environment and I am used to netlists while I can control the nodes easier.You should give it a try, with very little practice I think you will find that it's actually much easier to keep track of what nodes are connected where by looking at the schematic than it is by reading a large netlist.  I suggest again that you might not have made the errors with the signal references if you had used a schematic instead of a netlist.

Best,
  Fred

--- In LTspice@..., "qrx3" <fredh@> wrote:

Hello Hamed,

While I would also advise you to use a standard diode model instead of building your own, I may be able to shed some light on your difficulty.

Note that your derived values for ISC and VOC are generated in relation to the reference input 'ref'.  However when you use these values in your formulae you are using the value relative to ground:

log((v(isc)/{i0})+1)

The same is true when you use the input voltage:

(v(inp)*iscr)/1000)

I have not tried to run your circuit, but I strongly suspect this is why it would work for a single cell where ref = ground and not for a second cell where ref != ground.

I think the most sensible fix would be to reference eisc and evoc to ground instead of ref, so you can observe the values externally if you want and not have to subtract the ref voltage.  Then change "v(inp)" for example to "v(inp,ref)" where needed.

I suggest that if you had drawn this as a circuit instead of writing a netlist these issues would have been quickly apparent, but maybe not.

Cheers,
  Fred

--- In LTspice@..., "hamed" <l0st_l0rd@> wrote:

Dear friends

in the file below you can find an arbitrary solar cell.
When I put two cells in parallel the answer is correct and when I put them in
series I see a distortion.
I think the problem is related to the diode behavioral model.

I will be thankful if any of you could help me.

sincerely,
Hamed

Re: Strange behavior for simple RC circuit

#64774

I don't recall giving initial conditions for the cap, so if I did not
shouldn't the cap start



In a fully discharged state?
No, it would not.

The first thing LTspice does is find the initial operating point.  Voltage
sources are set to their DC values, and effectively LTspice "waits" until
everything stabilizes, before proceeding.

Remember that a DC voltage source is unchanging.  Ever.  It's as if your 6V
battery was created with the Big Bang and has been sitting at exactly 6V
ever since that time.  In effect you got what you asked for.  If you wanted
the circuit to start at 0V you should have set your battery to that.

There are a few ways to tell LTspice to behave differently.  One is to set
the voltage source to start at 0V and turn on at slightly after t=0.
 Another is to instruct LTspice to not find that initial operating point.

Andy

Re: Strange behavior for simple RC circuit

#64773

On Sat, 13 Jul 2013 23:01:59 -0400, Julio wrote:

  I am looking at simple RC circuit with a time constant of 1 sec and a 6 V
battery.

Doing a transient analysis, at t=0  the capacitor is already fully charged
at 6.0 volts!

I don't recall giving initial conditions for the cap, so if I did not
shouldn't the cap start

In a fully discharged state?Look at the .tran card (it's on the schematic.) Right click
it and look near the bottom of the dialog box to find "skip
initial operating point solution" and check it so that this
step will be skipped. Then re-run the solution.

Jon

Strange behavior for simple RC circuit

#64772

I am looking at simple RC circuit with a time constant of 1 sec and a 6 V
battery.

Doing a transient analysis, at t=0  the capacitor is already fully charged
at 6.0 volts!

I don't recall giving initial conditions for the cap, so if I did not
shouldn't the cap start 

In a fully discharged state?

Sincerely,

Julio

Re: different resistance for .tran and .ac not working any more?

#64771

--- In LTspice@..., "haubmi1" <Michael.Haub@...> wrote:



--- In LTspice@..., "Helmut" <helmutsennewald@> wrote:



--- In LTspice@..., "haubmi1" <Michael.Haub@> wrote:

Hello,

there was a feature to have a resistor with different value for .ac and .tran .

e.g.:

R 1 2 1u AC 1Gig

That was a resistor that was 1uOhm in .TRAN and 1GOhm in .AC.
This does not work anymore?

That was a very handy feature to switch in a loop gain probe in .AC which is not fisible in .TRAN .

Was this feature removed by accident or is that intended?
Did the syntax change?
Or is it my error?

michael

Hello Michael,

It's still working. Trust me.
Please show me your example and I will repair your schematic.

Best regards,
Helmut
Hello Helmut,

i have uploaded Files>Temp>loopgain-probe-test.zip.

I don't know what was the exact problem as a similar spice desk at work did not run as expected. Here at home the loop-gain probe did run in the new spice desk i made, but only with the alternate solver.
If you like you can have a look at it and tell me why it needs the alternate solver for DC bias point.

I will check on Monday why it did not run correctly at work.

Cheers,
Michael

Hello Michael,

You have used resistance values of 1f. That's a very bad idea.
Change it to 1u and the simulation will run with the normal
solver. Lesson from today: never use femto-Ohms.

.subckt simple-openloopgain1 in out params: reakt=100Gig
L1 in out {reakt} Rser=0
C1 2 1 {reakt} Rpar=0
R1 in 2 100G AC 1u
R2 out in 1u AC 100G
V1 1 0 0 AC 1
.ends simple-openloopgain1


Best regards,
Helmut

Re: Help! How do I do find maximum signal easily!

#64770

hmmm...maybe I was too quick to dismiss this
IF I use three 'different' text files, one for each analysis type, then bounce between them! 
Now if there is just some way to include the the command strings: 
'file'
'export'
select style of output, 
overwrite, yes

is there a way to add command strings like this??

If so, you have REALLY automated this for me!


--- dwh@... wrote:

From: David Hawkins <dwh@...>
To: LTspice@...
Cc: Macy <macy@...>
Subject: Re: [LTspice] Re: Help! How do I do find maximum signal easily!
Date: Fri, 12 Jul 2013 16:07:44 -0700


[snip] and the .ac using specific values requires storing on the
schematic a list so long that it makes the schematic the size of a
postage stamp in auto size. perhaps a plus sign on the first of a few
lines will allow wordwrap - narrow width with long list.Why not put all the relevant text into file, and then .include it.
It makes the schematic look nicer, and allows you to add
header comments to the file along with relevant comments
throughout the file.

Cheers,
Dave

Re: arbitrary solar cell model

#64768

--- In LTspice@..., "analogspiceman" <analogspiceman@...> wrote:
There is no problem with LTspice.  It is faithfully calculating
the original poster's extremely ill formed diode equations toHuh?  It's just the standard diode equation, as taught in every elementary device course.  It may not be the best way to do what the OP is trying to do, but it seems quite reasonable to me to expect that it should give a reasonable answer.  After all, spice solves this exact equation in maybe a majority of the active circuit it simulates, maybe for a dozen elements at a time, why should one expect that it can't handle it in a dependent source?  To call this "extremely ill-formed" seems quite hyperbolic.  These sorts of content-free, bullying responses make me think the bully is trying to avoid intelligent discussion by intimidation.  Sorry I don't react well to that, and I really expect better from this forum. [/rant]

The trouble arises from taking the ratio of two exponential
expressions that both may grow to very large values.Not really, the exp() in the denominator is constant, and a reasonable value (e**21.7 is well in range of even single-precision floats), it just modifies the constant Visc multiplier to provide the correct open-circuit voltage.  The case where things fail is when the input is negative so nothing should blow-up.  The "very large" values occur with positive voltages where everything works fine.  However you are certainly correct that LTspice seems to be launching itself off the end of its numerical range, ending up with a solution that is completely unrealistic yet the simulator does not recognize that this has happened.

Look at the circuit when Vout is negative.  The Bidiode source becomes a very low-value current source, with very low incremental conductance.  It is in parallel with two high-conductance linear resistors.  The Rs dominate what is happening in this regime, why on earth would spice feel the need to drive the voltage at that node so far negative that it wraps around?  The circuit is very well-behaved in this range but somehow spice goes off the deep end.  I'd have more sympathy if the sim failed at higher voltages when the B source had a significant dI/dV, not where the element is basically out of the circuit.  Or if there were no resistors in the circuit so the dV/dI might blow up, but that's not the case either.

As more proof that something odd is going on, why does this problem go away when the Voc voltage is changed from an expression of constant inputs to a pure constant?  There is no reason the solver should be perturbing the constant inputs to that equation, but apparently it is.  This also works fine in a transient analysis if one starts the independent sources at 0, but not otherwise.  This raises the question: does LTspice try to solve things like this with some higher-level approach than an incremental analysis?  Symbolic analysis?  I'm at a loss.

lead to numerical clipping, which LTspice handles well without crashingNice that it doesn't crash, but it is wrong to claim a valid solution when this happens, and worse that it uses this bizarre state as the starting point for the next iteration.  At the very least make a mention of this in the error log.  I'd prefer it recognize that the clipping (wrap-around, I think) has occurred and at least flag that it can not find a solution, as it does in many other situations, or try a different approach like it does for a difficult operating-point.  As an experiment I converted the exponential current source into a logarithmic voltage source.  Spice had even more trouble solving that at low voltages (not terribly surprised) but at least it recognized that it could not find a solution and moved on to the next point. Once it found a real solution it was fine from there on.

but the clipped value causes the ill formed equation to have two solutionsI'd understand that if the equations had two solutions, stable or not, but they do not.  What it reports is not a solution at all, KCL is not remotely satisfied at the reported "solution," there are a zillion Amps flowing out of that node from both the diode and the voltage source, and only 9 Amps flowing in.  But somehow 73MAmps is within tolerance of 1.#INDA Amps, whatever that is.

Latching onto the clipped solution can be avoided either by turning
the input source, V1, upside down so that the approach is from the
favorable direction, or by limiting the expression for BIdiode to
only positive values by wrapping its expression within a uramp()
function (or some other suitable limiter).The first option doesn't help the OP, but the second is a simple fix that seems to work well.  I put the uramp() inside the exp() rather than outside and everyone's happy.  Why this works when all it really does is add a discontinuity to the dI/dV is well beyond me.

It is always best to use the built in devices whenever possible
because their internal expressions will always have be manipulated
to be as well formed as possible.I agree completely, and you'll see I still recommend that in my responses, but this bothers me anyway because I like to think of LTspice as a general-purpose nonlinear equation solver and here is a simple case of well-behaved equations yet it both fails misesrably and fails to recognize that it failed miserably (I have to think of the original Star Trek episode with "Nomad," once it realized it had made a mistake and, worse, failed to correct its mistake it had to self-destruct.  I'm not advocating that behavior for LTspice).

Cheers, sorry for the rambling, have a great weekend all,
  Fred

Re: The road to LTspice

#64767

A couple of programs that were nodal analysis (net list only entry) on mainframe computers that were precursors to SPICE. Namely ICAP (IBM Circuit Analysis Program) and then PCAP (Princeton Circuit Analysis Program).

Regards, (9V1MI, WN8P) Larry

Re: arbitrary solar cell model

#64766

Hi Hamed,

I still recommend using the standard diode elements instead of writing your own, the only reason you would not be able to do that is if you need to change the Temperature -during- a transient simulation, e.g.  I think everything else (irradiance/Isc) can be adjusted dynamically, and you can have multiple cells in any topology, all with different temperatures and Isc.  Temperature can be swept for one/multiple/all devices in an Operating Point solution if that's what you need.

If you still think this does not meet your needs please state what you have to do that you can't do with the standard model and I can show you how to fix your equations so that it works.  Whether it's reasonable or not LTspice can not handle your equations as you have written them, but it can be fixed.

-Fred

Show quoted text

--- In LTspice@..., "qrx3" <fredh@...> wrote:

Hello Hamed,

I had a chance to look at this a bit more closely, and I do think LTspice is having a problem with this circuit that it should not have.  I have created a simpler version of your circuit, in schematic form, and placed it in the Temp directory.  The file is "BadExp.asc."  If you run it as-is the simulator fails to find a reasonable solution, voltages and currents that should be in the single-digits are in the 100ks or Megs, not where they should be.  However if you change the simulation command to start the DC sweep at 0V instead of -1V it works fine.  This is what I saw with your circuit too, I think having two cells in series might have caused the simulator, at some point in its search, to have a negative voltage on one of the cells, and everything blew up.  It seems that LTspice tries to use the results of each iteration to start the next iteration, so once it's gone off the rails it stays there.  But it really shouldn't be having any problem calculating the solution with negative input voltages.

Another way to 'fix' the problem is to force the B-source for Voc to a constant value of 0.564V.  This is odd since even when the sim fails that B-source has that correct value on it, while the Bidiode source blows up.

I have sent this circuit and observation to Mike @ LT, I'll report back here when I hear from him.

--- In LTspice@..., "hamed" <l0st_l0rd@> wrote:
the reason that I use arbitrary model not a standard diode is that I cannot control temperature change for each solar cell in diode model.But as you've been told this is not true.  You -can- control the temperature independently for each instance.  What's more, the standard model will have the correct temperature dependence while you  already know that your equations do not calculate Voc correctly over temperature.

--- In LTspice@..., "hamed" <l0st_l0rd@> wrote:
Furthermore, the reason that grounds are different is that two cells are in series.Yes, I understand why you want your model to float so you can connect them without reference to ground, but as I said you did not implement this correctly.  Your formulas for Voc and Isc are referenced to the 'ref' node but then when you use those values in the subsequent calculations you are using their value relative to ground.  This is wrong.

Actually I should say that I am not so good in schematics environment and I am used to netlists while I can control the nodes easier.You should give it a try, with very little practice I think you will find that it's actually much easier to keep track of what nodes are connected where by looking at the schematic than it is by reading a large netlist.  I suggest again that you might not have made the errors with the signal references if you had used a schematic instead of a netlist.

Best,
  Fred

--- In LTspice@..., "qrx3" <fredh@> wrote:

Hello Hamed,

While I would also advise you to use a standard diode model instead of building your own, I may be able to shed some light on your difficulty.

Note that your derived values for ISC and VOC are generated in relation to the reference input 'ref'.  However when you use these values in your formulae you are using the value relative to ground:

log((v(isc)/{i0})+1)

The same is true when you use the input voltage:

(v(inp)*iscr)/1000)

I have not tried to run your circuit, but I strongly suspect this is why it would work for a single cell where ref = ground and not for a second cell where ref != ground.

I think the most sensible fix would be to reference eisc and evoc to ground instead of ref, so you can observe the values externally if you want and not have to subtract the ref voltage.  Then change "v(inp)" for example to "v(inp,ref)" where needed.

I suggest that if you had drawn this as a circuit instead of writing a netlist these issues would have been quickly apparent, but maybe not.

Cheers,
  Fred

--- In LTspice@..., "hamed" <l0st_l0rd@> wrote:

Dear friends

in the file below you can find an arbitrary solar cell.
When I put two cells in parallel the answer is correct and when I put them in
series I see a distortion.
I think the problem is related to the diode behavioral model.

I will be thankful if any of you could help me.

sincerely,
Hamed

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