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Re: Run LTSPice simulations programmatically with different settings (solver)
Thank you Mathias, my concern with this approach is that you stated that it is available in 24.1 however we are staying on 24.0.12 because of this posting on the front page of this group (posted below). Is that -ini flag truly not an option even though it is in the documentation?
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WARNING:? Do not install the latest version of LTspice for Windows (version 24.1.0)!? Analog Devices created a seriously flawed version, 24.1.0, and it does not work correctly on many simulations, especially if they are older or have SPICE models you previously used, or downloaded, or models from others.? Also there are a handful of other new bugs they introduced.? That version of LTspice should be avoided until it is fixed. NOTE: Analog Devices seems to have updated the latest installation file on Saturday, 25 January, but they are still calling it version 24.1.0.? They have promised a "fix" to the problems in version 24.1.1, but this is not that version yet, so it is still best to avoid it!? Use no higher than version 24.0.12 for now. |
Computation Error When Upgrading from LTSpice XVII to 24
I recently upgraded to LTSpice 24 and immediately noticed a computation error with a simple JFET source-follower simulation.? I've linked to screen captures of each, both using the exact same simulation criteria.? The correct simulation is from LTSpice XVII.? Note the correct curved frequency response.? However, the same simulation run in 24 appears as a linear function (with dB still selected) and the amplitude vs. frequency result is way off.? The AC voltage measurements are taken at R3, a 1K resistor.
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Clues, anyone?
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Paul
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Re: Run LTSPice simulations programmatically with different settings (solver)
.options method = ...
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On Thu, Feb 6, 2025 at 08:37 PM, <jkayzerman@...> wrote:
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Re: Run LTSPice simulations programmatically with different settings (solver)
Thank you Mathias that is very helpful and I do see it in the docs. My question is not just limited to the solver however there are other settings that may need to be changed such as 'Default Integration Method'. For this I would still need to use the -ini flag which is not working for me. Any thoughts on that? |
Re: Run LTSPice simulations programmatically with different settings (solver)
You can use the command line switches "-norm" and "-alt" for that.
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Starting with version 24.1, there is also an option ".options solver=..." you can set in the schematic / netlist.
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Best Regards,
Mathias
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PS: All this is very well described in the help file. But who has time ...
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On Thu, Feb 6, 2025 at 06:37 PM, <jkayzerman@...> wrote:
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Re: Trying to use .MOD file in schematic
Hi Andy, yes you are correct on your first supply about what attributes I want.
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The method I used is from this website.
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I am trying to simulate a ferrite bead in my circuit.?
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Here is the location I put it in. "C:\Users\WilliamFinley\AppData\Local\LTspice\lib" The .include "..." put the MOD file in the symbols library and I was able to open the text document stating how it was going to work. Thats why I have to use the SUBCKT name.
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Thanks, and please tell me more of what I can do to get this working.
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Will? |
Re: Run LTSPice simulations programmatically with different settings (solver)
¿ªÔÆÌåÓýIt might not work, because there would need to
be two '.ini' files that could not have different names. Maybe
have one installation in Program Files and one elsewhere. On 2025-02-06 17:54, thutches via
groups.io wrote:
-- OOO - Own Opinions Only Best Wishes John Woodgate Keep trying |
Re: Run LTSPice simulations programmatically with different settings (solver)
Perhaps you could have two installs of LTspice, one with Normal solver selected and one with the Alternate solver.? Your script could just pick the desired one to execute.
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Not tried this but I did check that the settings are sored with the installations so it just might work.
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Tim |
Run LTSPice simulations programmatically with different settings (solver)
I am working on a project to programmatically run LTSpice simulations on a server. I am using the command line interface to kick off the process from a python script and everything works as expected. The command I am using is this?
"C:\Program Files\ADI\LTspice\LTspice.exe" -b -run "mySimulation.asc"
It came up that my engineer wants to run certain simulations with the normal solver and other simulations with the alternate solver. This requires changing application settings and is not something that can be baked into simulation file. It looks like there is a way to do this by passing an ini file so the command looks like this:
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"C:\Program Files\ADI\LTspice\LTspice.exe" -b -run -ini "customSettings.ini" "mySimulation.asc"
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However the terminal freezes when I try this and the simulation does not run. Does anyone know why this is?
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I am aware of PyLTSpice and perhaps that is what I should be using instead of kicking off terminal commands? But it doesn't seem to have a way to change this setting so it doesn't help me in this scenario.
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I am using version 24.0.12
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Your help is greatly appreciated! |
Re: LTSpice AC simulation
We don't.? We don't always use 1 V at 0 deg., that is.
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I often use 2V, especially with RF or matched impedance circuits.? It gives you 1 V into a matched load.
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You can use whatever values you want.? Using other than 0 degrees is likely confusing, but use it if you want to.
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Very often we want to see something like "gain", which is Vout/Vin.? By making Vin = 1 V at 0 degrees phase, it makes it easier because it disappears from the equation and can be omitted.? Easier for you.
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Remember that .AC is strictly linear so everything scales linearly.
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Andy |
Re: LTSpice AC simulation
¿ªÔÆÌåÓýWe set the signal source for .AC simulation to amplitude 1 and phase zero so that they act as the references for amplitude and phase, which are required in order to report the amplitude and phase of the output signal. The output amplitude is calculated as a ratio - output/input, so that '1' isn't really 1 volt, it's just '1'. You could set it to any number and it would make no difference to the reported output number. But the phase reference really is 0 degrees, and the output is given in degrees, not any sort of ratio. What is a 'CS amplifier'? It's best not to use
abbreviations in messages, except perhaps for really well-known
ones like AC and RMS. On 2025-02-06 16:21,
abanindra.kumarmandal.ece24@... wrote:
-- OOO - Own Opinions Only Best Wishes John Woodgate Keep trying |
Re: Plumbing
It refers to the use of a plumb line. I have one made of bronze.
toggle quoted message
Show quoted text
I have never seen the word used in this context, English is not my native language and here they sometimes use words and abbreviations that confuse me. On Wednesday, February 5, 2025 at 01:44:54 PM GMT-5, Richard Andrews via groups.io <richardandrews.ma@...> wrote:
My Grandfather used to say "make sure it's plumb" meaning make sure it's perfectly vertical. He used to be a handyman and mason. |
Re: Over-voltage protection circuit does not work as expected
Jerzy, the problem is not the speed at which the overvoltage is detected, but whether it is a transient or not. You have to wait and see if the voltage returns to low values (a ringing) or if it remains high. Only in the second case do you have to trigger the triac and open the circuit. Otherwise, you will open the circuit incorrectly ?? |
Re: Any Good Reason to Create a Hierarchical Connector and Conductors to Route (Plumb) Ground Out of a Hierarchical Schematic
Hello All:
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On Wed, Feb 5, 2025 at 02:06 AM, eewiz wrote:
On Wed, Feb 05, 2025 at 9:25 AM, Andy I wrote:
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I am pretty sure this has nothing to do with version 24.1.1.? I think LTspice has always behaved this way - going back at least as far as LTspice IV and probably earlier.
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I did not wish to imply that 24.1.1 had any special status related to the findings I wrote about.
I simply meant to inform others that the work was conducted on 24.1.1.
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On Wed, Feb 5, 2025 at 02:06 AM, eewiz wrote:
On Wed, Feb 05, 2025 at 9:25 AM, Andy I wrote:
That observation is incorrect.? The net that LTspice labels "ground" in the lower-level schematic, is not actually ground when it becomes connected to the higher-level schematic.? Therefore the resistor outside the block is NOT connected to ground on both ends.? It must not disappear from the netlist, because it really is there!
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Now I understand what is happening.
On the top level, if that hierarchical net is disconnected from node 0 and then connected to a net with 1 volt, it will effect operation of the sub-circuit as expected even though that net remains connected to node 0 inside the sub-circuit.
LTspice does ignore those connections to node 0 made within a sub-circuit except:
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Inside the sub-circuit, probing that net says "This is ground."
Imagine that net is connected to the anode of a TL431 2.5V reference.
If you plot V(cathode)-V(anode) across the TL431 you get 2.5V.
If you plot V(cathode) you get 3.5V.
You see a quite confusing output, 3.5V above ground, from a 2.5V reference, because LTspice does not show the true 1 volt on that net.
It always says "This is ground." when probing that net, that in this example, actually has 1 volt on it.
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So, to avoid future probing confusion, I will remove (label 0) ground symbols from sub-circuit schematics and physically re-connect isolated net segments.
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Tony Casey suggested using the COM net (with its own triangular symbol) but, that has the same issue.
The COM symbols make the connected net say "This is node X1:COM." which is no better than node 0's "This is ground." message.
In either case, you can't see if there is any voltage on the net and you can't plot the net voltage because LTspice thinks it's a ground net.
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On Wed, Feb 05, 2025 at 9:25 AM, Andy I wrote:
It is actually reasonable to draw a lower-level schematic, where a net is called "ground" locally (using the triangle symbol), but also goes to an I/O pin (with a box around it).? That ENABLES you to selectively "override that ground".? If the higher-level schematic doesn't connect to the pin, it remains ground.? If the higher-level schematic connects it to +150 V, that net becomes not-grounded and has +150 V on it.? Think of it as a feature you didn't realize was there.
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Yes, I understand but, the issue is that the probe won't show the +150 V on that net and can't plot the +150 V on that net and can't .meas the +150 V on that net, unless all ground symbols are removed from that net.
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All for now.
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Re: Any Good Reason to Create a Hierarchical Connector and Conductors to Route (Plumb) Ground Out of a Hierarchical Schematic
It is all about context.? Context changes everything.
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I uploaded "Hierarchy_netnames.zip" which illustrates how the netnames change due to context.? It has five instances of lower-level schematics, each consisting of one resistor.? The pins connect to its symbol, and from there to nets on the top-level schematic.? LTspice "connects" them by making their netnames the same, so they are truly ideal connections with zero added resistance.
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(1)? Open MyRes1.asc, one of the lower-level schematics.? Hover over the top net and see that its netname in this view is "Top".? The context here is in isolation, not part of the main simulation.
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(2)? Then open Top_Level.asc which is the top-level schematic.? Now right-click on the X1 symbol and click "Open Schematic".? This opens that particular instance (X1) of MyRes1.asc.? Hover over the top net.? Notice its netname has changed from "Top" to "AAA".? It inherited the netname from the top-level schematic.? That is what happens whenever a subcircuit or a lower-level schematic is connected to nets in the next higher schematic.? The netnames in the lower-level schematic effectively change to match those of the higher schematic.
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This is where context matters.? By opening MyRes1.asc in isolation (by double-clicking on it in Windows Explorer), it has no context, and it must use the netnames printed on that schematic even though they will not be used.? By opening MyRes1.asc from the top-level schematic, you have given it context.? You have chosen that one instance (X1) of that lower-level schematic, and LTspice rewards you by showing the adjusted netnames as they exist in the main circuit.
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(3)? Open MyRes3.asc from Windows.? Hover over the top and bottom nets and note their netnames.? The upper netname is "Top" and the lower netname is 0 or ground.? That is correct in this context because connections have not been made to any other schematic's nets.? Those are temporary netnames.
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(4)? Now open Top_Level.asc again.? Do these steps in this order:
(LTspice has a wee synchronization issue, making it necessary to do these steps in this order.)? The former "Top" net has inherited the netname "DDD" from the Top_Level schematic.? The bottom netname is no longer ground!? It has inherited the netname "EEE" from the Top_Level schematic, replacing node 0.
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Like I say, context changes everything.? By viewing the schematic of that one instance (X3) of the lower-level schematic, you see what the netnames change to.? What you thought was ground, is now a different net, named "EEE".? That is true only in this context.? Without context, the lower net looked like ground, which was a temporary netname.? Context is everything.
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What's going on is basically this:? On lower-level schematics or in subcircuits, expanding the SPICE netlist causes every net that goes to a pin to have its netname changed.? All of them inherit the netnames of the nets they connect to in the next higher hierarchy level.? LTspice does that uniformly, making no exception for node 0 - even node 0 changes to another name.? You see that only in the context where it is part of the top-level schematic.? Without that context, it appears to be ground, but that was just a place-holder.
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I was wrong about something.? I thought that if you left the net not connected to anything in the top-level schematic, it would revert to ground.? But alas, it does not.? Even floating pins without wires have netnames, and it picks up that netname instead of defaulting to ground.? Therefore, the usefulness of grounding a net on a lower-level schematic, and simultaneously bringing it out on a pin that can go somewhere else, seems awfully limited -- to the point that I don't see very much reason for doing that.? I can envision a few reasons to do it anyway, to modify one schematic to use as a lower-level block without making extensive manual edits.? But?it seems not useful to draw a new schematic that way.
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I hope some of this makes sense.
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Andy
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