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lvc1g123 or hct423

 

Hi,


i am searching for a solution so simulate the monostable multivibrator lcv1g123 or hct423. Do anybody know a solution or have anybody a spice model?


Thx, Gerald
Re: differimproved

 

Hello Marcel,

I only had commented it, because it's the default. I always have the defaults in the control settings of the SPICE tab. If you sometimes change the settings, then it makes sense to set it in the schematic.
?When one share a simulation to others it may be worth to mention that they should reset the SPICE settings in the Control Panel.

Best regards,
Helmut
Re: differimproved

 

Thanks Helmut! The result appears to be correct now?and is?

of course much faster (10us step instead of 1us, 1s t_end

instead of 10s).


Is there a special reason to comment out "method=trap reltol=0.001",

other that they are the default for LTSpice (not the case in my other,

LTSpice file compatible, simulator)?


-marcel
Re: differimproved

 

Hello Marcel,

I have improved your simulation settings.

It's mostly not a good idea to use uic. One has to wait then that any bias capacitors reach it's steady state. uic should be only used as an exception if a simulation has convergence problems or one want to simulate the startup behavior. For the ladder case it's even better to ramp-up the supplies.

1. no uic

2. max time step 10u

3. .four set to 10 periods

The reported THD is now 0.175%.

Files > Temp >

Best regards,
Helmut
model for LI ion battery in Ltspice

 

Hi,
I have been searching for a model of Li ion battery and found the model of a Saft battery. But the code on the schematic is so clumsy and also the results seems to be off.Can anybody plz upload any other model of a Li ion battery.If it is possible,you really will be a life saver.Thankyou.
Re: differimproved

 

> You forgot to include the models for the output transistors, QBD139
> and QBD140.

Sorry, I'll fix that.

> It's generally not a good idea to refer to unnamed nodes
> (N007 and N008) in the plots, when you save the .PLT file

True. BTW, my idea is to look at the peak difference between the input and output signal. In my case it is about 500uVpp for 5Vtt output. It looks like 3rd order distortion.?I don't see how?this could ever translate to 1.8% THD.

> How are you measuring the THD? ?This is a transient analysis, which
> makes me think you will do an FFT. ?If so, it is essential that you turn
> off waveform compression:

> .options plotwinsize=0

> This is quite possibly why your LTspice simulation has the distortion
> it has. ?Look at the bottom of the Help page for Waveform Viewer >
> Waveform Arithmetic, and note how the simulation there uses both
> plotwinsize=0 and numdgt=15, to get the best waveform accuracy
> for the FFT.

Thank you. I tried this but it doesn't help at all.

> You also ought to have many waveform points per sine wave. ?
> Your simulation calls for a maximum timestep of 100us, which
> means only 10 samples per cycle. ?It might work OK with that,
> but I'd feel better with more samples per period.

You nailed it. This is no problem in my other simulator (which explicitly
interpolates the data before the FFT) but in LTSpice one apparently
must rely on oversampling for reliable results. With 1 us max. stepsize
I get very good?results (but it takes ages).

With 100 us steptime even the INPUT voltage (the sine generator)
has 1% THD :-)

> Running your simulation with other output transistors, the
> amplifier does not seem to be very symmetrical and it is
> not biased right. ?

It is ok for my BD139/140 models. I think 500 uV pp error is
quite good at 5Vpp output. Of course it would be fun to improve
that.

> Why does C5 have an initial condition
> of 7.5V ? ?I think that's wrong, given that the
> supply voltage is 7.5V and that C5's voltage
> ultimately needs to reach ~0V.

You are completely right. Simple brain fart on my part.

> Also, why use UIC? ?You have this great simulator which
> can figure out the initial operating point for you; why not use it?

I am not aware that LTSpice has a PSS algorithm?

Thank you for the expert advice, it really helped!

-marcel
Re: differimproved

 

Thanks Bordodynov.


I do not intend to build this amplifier in its present state. I found its THD problem (compared to the asymmetric original) interesting, and hope that somebody can explain why?LTSpice's FFT shows unexpectedly bad results (and why it simulates so slowly).


-marcel
Re: Is the Group down?

 

Well, it's back on-line, now. I wonder if anything is changed, though...


Vlad
______________________
-- holding, among others:
a universal analog/digital filter, block-level models
for power electronics (and not only), math blocks
with a more stream-lined approach, some digital
ADC, DAC, (synchronous-)counter, JKflop, etc.
Re: Using parameters and functions when defining a plot

 

Hello

You could add a few bits to the schematic, such as abs(v(c1)) with an ideal diode + capacitor, then use that voltage, say v(max), to divide the final answer, v(c1)/v(max). If you want to avoid doing this manually, everytime you plot v(c1), you could simply add a B-source to your liking with that expression.
There could be another solution with the integrated S&H, but that would require a clock, or others, it's just a suggestion.


Vlad
______________________
-- holding, among others:
a universal analog/digital filter, block-level models
for power electronics (and not only), math blocks
with a more stream-lined approach, some digital
ADC, DAC, (synchronous-)counter, JKflop, etc.
Re: differimproved

 

Hi.
Your electronic scheme extremely unchancy. I have even said bad. The Modes of the second cascade are assigned resistor with nominal value 100kOhm. The Current aproximately is (Vcc-0.6V)/100K*Beta/2=(7.5-0.6)/100000*500/2=17.3mA (LTspice gave 15.6mA). At heating current will increase (since grows Beta).
Will In addition give change the current scatter parameter input cascade. So I do not advise to do the real amplifier on your scheme.

Bordodynov.
Re: Security?

 

Hello,

One has to distinguish between (LT)SPICE files and program files.

Any LTspice related files (symbols, models, plot directives) can never have any virus.

I don't know how Yahoo has checked the uploaded programs(.exe). The exe-programs have been mostly in the section Files>Util of this group.

Best regards,
Helmut
Re: How can I make my simulation oscillate like my poorly designed PC board does?

 

Hello Carl,

I am glad you were able to work out your mistake on your own.? I really, really do appreciate that.? LTspice is an amazingly capable processing tool, but the usual ³¦±ô¾±³¦³ó¨¦ homilies still apply, e.g. "garbage in -- garbage out."

I very much would recommend that you explore how damaging the gate oscillation effect can grow as the power supply voltage is increased.? Try changing the 5 volt value of the supplies on your schematic to 25 volts and examine the ac voltage that LTspice predicts will appear on the gates and you will see why the series Q-damping resistor is absolutely essential.


---In LTspice@..., <carlvanwormer@...> wrote :

Thanks for all of the help and suggestions!? I had the feedback going to the drain, instead of 5nH away from the drain.? I started noticing a little wiggle, and then changed parts until I was getting results similar to my bad PC board.? I noticed that the type of FET (model) made a big difference in the sensitivity to oscillation.? Once I got the "good" oscillations, I found that a series damping resistor could eliminate the effect.? In addition to lower inductance routing, the new layout will have the extra resistor to eliminate the possibility of this oscillation.

I've uploaded a file demonstrating the cause and cure of the oscillation (Oscillating Miller FETs 03.asc).? Thanks for the education!

Carl
Re: Security?

 

Good question, but alas, too late for you.? This Yahoo group is undoubtedly secretly, violently infected with untrustworthy viruses.? In fact, by reading this message you personally are probably fatally infected with the AIDS virus.? You are no doubt doomed, so please send all of your monetary assets to Yahoo groups immediately.

Okay, that was sarcasm, but it is messages like yours that lead me to avoid responding altogether on this group very much any more.? No doubt you cannot help being the way you are any more than I can help being the way I am.

To give your original question a serious answer, it is mind-numbingly ignorant to think that SPICE code could possibly be infected with such viruses.? In the future, once you have gained some working experience with LTspice, you hopefully will come to appreciate why this is so.

---In LTspice@..., <ag6qo@...> wrote :

Are the components etc uploaded here trustworthy?
Have there been any incidents of viruses etc embedded in files uploaded here?
Are there precautions taken to avoid it?
Re: Security?

 

ag6qo?wrote:

? ?"Are the components etc uploaded here trustworthy?
? ??Have there been any incidents of viruses etc embedded in files uploaded here?
? ? ??
Are there precautions taken to avoid it?"

The simple answer is that SPICE component models are plain text, and you can't hide a virus or malware in text. ?No component model is ever "executed". ?They are all fed as input to the LTspice program, which interprets them as text and parses them to get the information it needs. ?Even then LTspice is always in control, doing the things it needs to do to simulate a circuit. ?The model is never "calling the shots," nor does LTspice have the capability to do much more than build waveform data and save it to its output files.

Could someone write a virus that exploits a heretofore unknown capability of LTspice to do something bad? ?I seriously doubt that it's possible, and just as unlikely that someone would know how to try.

Now, are ALL files here on this site guaranteed trustworthy? ?Here the simple answer gets more complicated. ?There are occasional Word DOC files and a few (VERY few) executable programs here, and a handful of HTML files.

This is a user-contributed forum, so yes, the possibility exists of something bad in an upload, under the guise of it being something useful.

I do not recall any incidents of malware here. ?On the other hand, Spam does rarely get through, either in messages or in the Links section, and they have all been dealt with promptly.

Regards,
Andy
Re: Li-ion BAttery models

 

The writings(code) on the circuit are clumsy and i could not infer anything ......can u plz mail me only the circuit with values separately?


On Friday, May 30, 2014 12:08 AM, "thutches@... [LTspice]" wrote:


?
Lohith,

The circuit I uploaded contains a Battery model that can be used to simulate a Li-Ion battery.

Tim
Security?

 

Are the components etc uploaded here trustworthy?
Have there been any incidents of viruses etc embedded in files uploaded here?
Are there precautions taken to avoid it?
Re: How can I make my simulation oscillate like my poorly designed PC board does?

[email protected]
 

Thanks for all of the help and suggestions!? I had the feedback going to the drain, instead of 5nH away from the drain.? I started noticing a little wiggle, and then changed parts until I was getting results similar to my bad PC board.? I noticed that the type of FET (model) made a big difference in the sensitivity to oscillation.? Once I got the "good" oscillations, I found that a series damping resistor could eliminate the effect.? In addition to lower inductance routing, the new layout will have the extra resistor to eliminate the possibility of this oscillation.

I've uploaded a file demonstrating the cause and cure of the oscillation (Oscillating Miller FETs 03.asc).? Thanks for the education!

Carl
Re: How can I make my simulation oscillate like my poorly designed PC board does?

 

Carl wrote:

? ?"I've uploaded a version of the file "Oscillating Miller FETs 02.asc" to the files/temp directory.? This file has my interpretation of your suggestions ..."

Maybe you forgot the 5nH to be added to the drain leads. ?You are still taking both the Miller cap feedback and the output from the on-die end rather than the external end of that 5nH lead inductance.

But I couldn't make it fully oscillate either. ?I got a tiny bit of ~160 MHz appearing at the gate input side of the FET in the slower circuit, but did not see the same at its output.

You mentioned adding a 47 ohm resistor in series with the gate drive. ?What exactly was your gate drive? ?Did the source have its own source impedance too? ?(Again, not that it makes it oscillate; it's just an observation/question.)

Regards,
Andy
Re: differimproved

 

Marcel wrote:

? ?"I uploaded differimproved.zip in /temp."

You forgot to include the models for the output transistors, QBD139 and QBD140.

It's generally not a good idea to refer to unnamed nodes (N007 and N008) in the plots, when you save the .PLT file for later use. ?I might not get the same nodes when I run it on my computer (though I probably will); and if I change anything in the schematic, those node names change.

How are you measuring the THD? ?This is a transient analysis, which makes me think you will do an FFT. ?If so, it is essential that you turn off waveform compression:

.options plotwinsize=0

This is quite possibly why your LTspice simulation has the distortion it has. ?Look at the bottom of the Help page for Waveform Viewer > Waveform Arithmetic, and note how the simulation there uses both plotwinsize=0 and numdgt=15, to get the best waveform accuracy for the FFT.

You also ought to have many waveform points per sine wave. ?Your simulation calls for a maximum timestep of 100us, which means only 10 samples per cycle. ?It might work OK with that, but I'd feel better with more samples per period.

Running your simulation with other output transistors, the amplifier does not seem to be very symmetrical and it is not biased right. ?Why does C5 have an initial condition of 7.5V ? ?I think that's wrong, given that the supply voltage is 7.5V and that C5's voltage ultimately needs to reach ~0V.

Also, why use UIC? ?You have this great simulator which can figure out the initial operating point for you; why not use it?

Regards,
Andy
Re: How can I make my simulation oscillate like my poorly designed PC board does?

 

Can you upload a picture of the circuit so we can see what the layout parasitics should be like?

I've looked at BJT modeling a lot, and I can say it is very difficult to even get enough measurements to make the RF behavior right. Few datasheets have enough information. If you want to copy oscillation in real-life, this is critical.

I imagine FETs aren't much different. At a few hundred MHz it's easily possible your model isn't accurate at all. Most models do a very poor job, though I can't speak directly to the quality of this specific model. I notice it is very short with few parameters however - not a good sign.
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