Re: Calculate average value of a waveform under specific conditions using .meas command
On Wed, May 7, 2025 at 12:40 PM, Tony Casey wrote:
I don't see why you have to specify small time intervals if your simulation has achieved steady state - each cycle will be essentially the same, so a full display of only 2 cycles will be ample - search by derivative will always find the transition. Don't make things more complicated than they need to be.
Dear Tony, I am new to LTspice, and everyone is trying to help me with my query. You have put time in providing me solutions and so has Andy. I am thankful to both of you. You are again correct, problems should be solved with as little complications as possible. With Regards, Ankit
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Re: Calculate average value of a waveform under specific conditions using .meas command
On 07/05/2025 08:13, ankitk.ace via
groups.io wrote:
I believe I will
have to finding the maximums and minimums localized to a specific
time interval (example: 10 ms to 11 ms) and then do the rest. Your
answer too is a clever solution just like what Andy suggested,
however, with a different approach and a little bit of tweaking at
my end because the inductor current rises and falls exponentially
(due to parasitics).
The rise and fall characteristics are only 2nd order effects -
linear or exponential, it makes little difference. If you actually
plot the derivative of the waveform, you get very pronounced spikes
at the start and finish of transitions. Try it and you'll see.
I don't see why you have to specify small time intervals if your
simulation has achieved steady state - each cycle will be
essentially the same, so a full display of only 2 cycles will be
ample - search by derivative will always find the transition. Don't
make things more complicated than they need to be.
--
Regards,
Tony
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Re: Calculate average value of a waveform under specific conditions using .meas command
On Wed, May 7, 2025 at 12:00 AM, Tony Casey wrote:
.MEAS MaxdV max d( I(L_filter_dc)) ; max +v derivative
.MEAS T1 when d( I(L_filter_dc))=0.98*MaxdV rise=1 ; start of 1st +ve transition
.MEAS MindV min d( I(L_filter_dc)) ; max -ve derivative
.MEAS T2 when d( I(L_filter_dc))=0.98*MindV fall=1 ; start of 1st -ve transition
.MEAS T3 when d( I(L_filter_dc))=0.98*MaxdV td=T2 rise=1 ; start 2nd +ve transition
Dear Tony,
?
Thank you for answering again.
I believe I will have to finding the maximums and minimums localized to a specific time interval (example: 10 ms to 11 ms) and then do the rest. Your answer too is a clever solution just like what Andy suggested, however, with a different approach and a little bit of tweaking at my end because the inductor current rises and falls exponentially (due to parasitics).
With Regards,
Ankit
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Re: LTSpice, easy uF / uH with UTF16 saved schematic
Also, the comments in the two new uploaded files are somewhat misleading.
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"u" is always ASCII 0x75, when encoded with the normal ANSI character set.
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"?" is extended ASCII 0xB5, when encoded as a single byte with the ANSI character set.
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LTspice transforms a leading "u" to a "?" when it is on a schematic and used as a units multiplier, unless you have changed that setting in LTspice's Settings / Control Panel.? So the default action in LTspice is to convert 0x75 to 0xB5 (that is, to convert 'u' to '?') when it is on a schematic and used that way.
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LTspice can be changed to the exact opposite behavior, where it treats a "u" as a "u" and converts a "?" to a "u", when it is found on a schematic and used as a units multiplier.
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Some programs misinterpret the extended ASCII character 0xB5, turning it into a different 1-byte or 2-byte character that it thinks should be similar.? When saved and later read back into LTspice, or saved and read by other text editing programs, in most cases it will appear to be a corrupt letter or pair of letters, of one form or another, and not as a "?" anymore.? I have now seen three different incorrect "substitute" characters for a "?", where none of them work when the schematic or SPICE Netlist file is read back into LTspice.
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LTspice's handling of UTF* files is somewhat unconventional.? That is a grey area and best avoided, in my opinion.
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Andy
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Re: LTSpice, easy uF / uH with UTF16 saved schematic
On Tue, May 6, 2025 at 10:21 PM, wai wai wrote:
The solution, to force LTspice to save schematic to be UTF8 or UFT16, just add some local "char" (double bytes) to the schematic, and then LTSpice will be saved files as UTF16 by default.
That lacks backwards compatibility to anyone using an older version of LTspice.? (Yes, there are still some out there with old XP computers who do not wish to - or can't - upgrade to a newer LTspice.)? Also, I am unsure whether the native Mac version yet supports "Unicode" schematics.? (I think it does.)? If not, they would be unable to open said schematics.
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Furthermore, LTspice's "Unicode" has proven to be a much bigger headache than anyone imagined.? Most problems with it have finally died down now, but I am sure they will still arise.? With an alphabet of some 150,000 characters, it is a thousand problems just waiting to happen.
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The easier solution, is this one:
- Go to LTspice's Control Panel (or Settings)
- Netlist Options
- Check the checkbox next to "Convert '?' to 'u'".
- Click OK
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This problem with '?' rarely ever happens anymore, now that the group migrated from Yahoo to Groups.io.? Since people should never email LTspice schematics by cut-and-pasting raw text, that isn't a problem either, or it should not be.? For person-to-person emails, attaching an LTspice schematic (as an attached file) works great, as does attaching a .ZIP file.? For schematics sent to this group, uploading the LTspice schematic works great, and that is what everyone should do.? So there should be no issue anymore, unless you do things wrong.
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By the way, LTspice is not spelled "LTSpice".? Also, files should only be uploaded to the "Temp" folder.? Always navigate to that folder first, before clicking the "+New/Upload" button.? Just like it says in the group's guidelines.
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Andy
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LTSpice, easy uF / uH with UTF16 saved schematic
LTspice default will save schematic (*.asc) as ANSI ASCII file.?
uH or uF, the "u" is extended ASCII "0xB5", "mu" (?) to mean micro,
see the glitching and comments,
/g/LTspice/topic/opa_square_wave_generator/112608874
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LTspice XVII save such schematic, "0xB5" will be saved as ANSI text file, open the file by editor, and/or copy/paste to HTML or translation, the UTF8 capable application will see double bytes as treated as UTF8/UTF16 etc.
The solution, to force LTspice to save schematic to be UTF8 or UFT16, just add some local "char" (double bytes) to the schematic, and then LTSpice will be saved files as UTF16 by default.
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this is example of output of the solution,
SYMATTR InstName C2
SYMATTR Value 1?f
TEXT 112 160 Left 2 ;1uF = 1湩
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Re: Simulation of MMC 3-Level on Ltspice
Bouzid.wis,
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I am having trouble trying to understand how this circuit works.
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In the upper submodule, it seems like M1 can not do much, because C1 would charge and then not pass any more current, so that closing M1 does not add any more change.? But I think it is not as simple as that.? There are multiple current paths here, including through the capacitors and through the diodes that bypass the FETs.
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Can you describe how each submodule was supposed to pull the output either up, or down?
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Is there a minimum frequency limit for the sinusoidal signal you want to synthesize?
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As drawn here, the two submodules are not symmetrical to each other.? But maybe that was just a personal choice about how the schematic was made.
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I am only guessing here, but it looks like maybe you have one of the submodules inverted.? When the voltage V(ControlA) approaches +1V, the FETs with the DC path (M2 and M4) are both OFF while the two with series capacitors and no DC path (M1 and M3) are both ON.? So very little current can flow through L2 or L3, to or from the load.? When V(ControlA) approaches -1V, it is the opposite:? both DC-path FETS are ON, resulting in lots of current in L2 and then out L3 without making it to the output load.? In both cases, the output gets nothing.? Check your connections because I think it is not right.
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But as far as SPICE goes, I think it simulates OK.
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FYI, there are easier ways to generate triangle waves.? The normal voltage source with PULSE is ideal for this.
? ? Vm Tri_up 0 PULSE (-1 1 0 50u 50u 0 100u)
? ? Vn Tri_dwn 0 PULSE (1 -1 0 50u 50u 0 100u)
or
? ? .param RF=0.5/fs? ; Rise and Fall time
? ? Vm Tri_up 0 PULSE (-1 1 0 {RF} {RF} 0 {2*RF})
? ? Vn Tri_dwn 0 PULSE (1 -1 0 {RF} {RF} 0 {2*RF})
But it doesn't hurt to do it the way you did.
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Andy
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On Tue, May 6, 2025 at 05:12 PM, John Woodgate wrote:
What version allowed the sim to run without stalling?
Using computer #1 today, so it is lowly LTspice XVII.? Not LTspice 24.
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You night have been hit by a yet-to-be-fixed bug - er, I mean side effect they added in version 24.1.x.
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Andy
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On Tue, May 6, 2025 at 05:33 PM, <arhamishtiaq42@...> wrote:
so do you think my primary side current is fine?
That is a somewhat difficult question for me to answer.? Maybe others can speak to this better than I can.
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But I think the answer is "yes", I think it is normal.
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Because the waveforms are not sinusoidal and the voltage and current waveforms are so very different from each other, you can not use Vrms*Irms to estimate power.? You must multiply V(time) by I(time) at every moment in time, then average the product over time.? And when you do that, you find that the power into the primary = 593 W, even though its Vrms * Irms = 95.6 * 12.9 = 1233 VA.
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(I am still wondering where you got 40 A from.? My simulations did not come close.)
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I think the only way for the primary current to be around 500 W / 100 V = 5 A, is if the transformer's primary current was also a square wave and in-phase with the voltage there.
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The energy source (V9) provides 597 W, the transformer passes 593 W, and the load (R1) dissipates 458 W.? These are from simulating your third schematic, dd.asc, without UIC, and waiting until after the initial transients die out.
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Andy
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On Tue, May 6, 2025 at 06:35 PM, John Woodgate wrote:
.... But I already told you that there is a very large inrush current because of the large capacitor across the zero-impedance source V9. ...
I think that problem goes away if you get rid of the UIC.? There is no need for UIC here.? Don't use it unless it is needed.? Change:
? ? .tran 0 100m 0 uic
to:
? ? .tran 0 100m 0?
or:
? ? .tran 100m
or even this:
? ? .tran 10m
?
I do not think you can expect to see V*I at either primary or secondary to be only a little more than Vout*Iout.? Both waveforms very non-sinusoidal and in different ways from one another.? Thus, Average(V(time)*I(time)) does not come even close to Vrms*Irms.? I think you need to accept that the RMS current can not be calculated by dividing the power by the RMS current.? Math just doesn't work that way, so long as the waveforms are neither DC nor sinusoidal.
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It should not be much larger than output
current x output voltage/input voltage. That is, power out/input
voltage. But I already told you that there is a very large
inrush current because of the large capacitor across the
zero-impedance source V9. The other capacitors also charge when
the associated FET switches off.
On 2025-05-06 22:33, arhamishtiaq42 via
groups.io wrote:
so do you think my primary side current is fine?
--
Best wishes John Woodgate RAYLEIGH Essex OOO-Own Opinions Only
If something is true: * as far as we know - it's science *for
certain - it's mathematics *unquestionably - it's religion
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Re: Simulation of MMC 3-Level on Ltspice
I don't know if this matters in your simulation, but you have started with much less than a sine wave.? 9 ms is less than one-half cycle of 50 Hz.? The output waveform does not seem right, however.
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Be careful about using multiple net names on the same net.? In SPICE, every net can have only one net name ("Label" in LTspice).? One of your nets has at least three names assigned to it.? Most of the time LTspice figures it out, but sometimes it does not.
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Andy
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Re: Simulation of MMC 3-Level on Ltspice
On Tue, May 6, 2025 at 03:53 PM, <Bouzid.wis@...> wrote:
Ich habe die ltspice-Datei unter dem Namen M2C single-phase SPWM112 auf Temp hochgeladen?
Remember to use English only in this group.
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Translation:? "I have uploaded the ltspice file under the name M2C single-phase SPWM112 to Temp"
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Note:? The actual filename is "M2C single phase SPWM112.asc".
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Andy
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On Tue, May 6, 2025 at 05:15 PM, John Woodgate wrote:
You get that from the foundry you plan to use to make your device.
That is true, and it's something I often remind people about.
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Sure you could grab some random "90nm" model file and play around with it, but don't use it to model any actual circuits that you plan on building.? When you build it, you need to know the model details from your FAB house.? They hold the recipe.? They set the process that determines how the transistors come out of the oven.? It won't be the same as those from another 90nm foundry.
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To be clear, Andy has found some contributed information, which is 5 years old.
Some of them were much older than that, going on 20 years now.? At some point in someone's distant past, those models worked for THEM with the ICs THEY were getting from some foundry which might not exist anymore.? When you go to build your ICs, you will need to get models for the 90nm FAB process you use.? Best to start with them instead of fooling yourself by borrowing someone else's model that does not represent today's reality.
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To be clear, Andy has found some contributed
information, which is 5 years old. LTspice itself has no data on
fabrication technology. My advice still stands; contact the
foundry.
On 2025-05-06 22:13, John Woodgate
wrote:
You get that from the foundry you plan to
use to make your device. LTspice doesn't have that
information.
On 2025-05-06 21:52, Tsukuyo via
groups.io wrote:
Hello guys, Does anyone has 90nm CMOS technology text file
or link something like that. Absolutely for LTspice.
--
Best wishes John Woodgate RAYLEIGH Essex OOO-Own Opinions Only If something is
true: * as far as we know - it's science *for certain - it's
mathematics *unquestionably - it's religion
--
Best wishes John Woodgate RAYLEIGH Essex OOO-Own Opinions Only
If something is true: * as far as we know - it's science *for
certain - it's mathematics *unquestionably - it's religion
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On Tue, May 6, 2025 at 05:14 PM, <arhamishtiaq42@...> wrote:
Sorry, I uploaded the wrong file earlier
Good to know.
My desired output is 150?V, and I’ve noticed that changing the transformer inductances is affecting the output voltage.
As it must.
Currently, if I set the transformer values as L1 = 110??H, L2 = 250??H, and L3 = 1??H, the primary-side current becomes too high.
How much is "too much"?
Since I’m designing a 500?W Dual Active Bridge (DAB) converter, I expect the primary current to be around 8?A, because
I'm supplying 500?W at 100?V input:
So therefore it provides less than 500 W to the load, right?
Iavg=P/Vin=500/100=5 A
IRMS?≈1.3×Iavg?=6.5–8?A?but it’s exceeding that.
But some of that current into the primary represents reactive power, not real power.
Also, by “steady state,” I mean that the average current should not be zero
Um, we are not speaking the same thing.? The average current must be zero.? Transformers do not pass DC.
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Andy
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You get that from the foundry you plan to use
to make your device. LTspice doesn't have that information.
On 2025-05-06 21:52, Tsukuyo via
groups.io wrote:
Hello guys, Does anyone has 90nm CMOS technology text file or
link something like that. Absolutely for LTspice.
--
Best wishes John Woodgate RAYLEIGH Essex OOO-Own Opinions Only
If something is true: * as far as we know - it's science *for
certain - it's mathematics *unquestionably - it's religion
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On Tue, May 6, 2025 at 04:53 PM, Tsukuyo wrote:
Hello guys, Does anyone has 90nm CMOS technology text file or link something like that. Absolutely for LTspice.
They have been discussed here a number of times, including these:
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I would take all of them with a great deal of caution.? Of these four, the last one is newest
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Andy
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What version allowed the sim to run without
stalling? I am now using 24.1.8, and the sim stalls after a
different number of microseconds , depending on which tweak I
have made to the .ASC.? I don't tweak the Spice settings, like
Gmin and Abstol.? I let it run for minutes and the stall did not
resolve. The expanded netlist shows a huge number of reports of
'simulation tolerance relaxed' between time points that are
small to begin with and eventually appear identical at 17
significant figures. It looks to me that some sort of error
message should appear, rather than the stall just persisting.
On 2025-05-06 21:44, Andy I via
groups.io wrote:
On Tue, May 6, 2025 at 02:08 PM, John Woodgate wrote:
... But the simulation
still stalls without an error message after less than 1
ms.
My simulation did not stall.? It is somewhat slow and I did
not wait 100ms for it to finish, but it never stalled.? That
might be because of different Control Panel settings, or it
might be because of different LTspice versions.? My simulation
had plenty of "Heightened Def Con" warnings, which are not a
good sign.
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As far as I can see, your
switching waveforms allow each pair of series FETs to be
on together, briefly, which is not good.
That is the short-circuit current (sometimes erroneously
called crowbar current) through the FETs, and can be the cause
of much of their power loss which is where about 130 watts were
lost.? Switching transistor circuits should be designed with
non-overlapping drive signals so that it won't happen.
?
?
--
Best wishes John Woodgate RAYLEIGH Essex OOO-Own Opinions Only
If something is true: * as far as we know - it's science *for
certain - it's mathematics *unquestionably - it's religion
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Hello guys, Does anyone has 90nm CMOS technology text file or link something like that. Absolutely for LTspice.
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Tony Casey
wai wai
John Woodgate