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Re: Problems using Pspice fet model for infineon BSR202N.
Bordodynov wrote, "but the temperature of the transistor chips is zero, which is not correct." That happens because of the .TRAN ... STARTUP option, which starts the heatsink temperature at 0 instead
By Andy · #108521 ·
Re: Problem with inserting components and drawing wires
Hello, I searched a little bit with Google. Maybe this problem has to do with a mouse setting. https://www.hawkdive.com/cursor-moving-and-clicking-by-itself-on_30/
By Helmut Sennewald · #108520 ·
Re: Problems using Pspice fet model for infineon BSR202N.
Hi richard. I made a solution to the problem of calculation, but the temperature of the transistor chips is zero, which is not correct. I do not like these models. To all, due to the complexity may be
By §¡§Ý§Ö§Ü§ã§Ñ§ß§Õ§â §¢§à§â§Õ§à§Õ§í§ß§à§Ó · #108519 ·
Re: Problems using Pspice fet model for infineon BSR202N.
I think you are right. I made a mistake. Sorry. sbb2.zip in the files area should demonstrate the problem. I will have a look at the help file you have refereed to. I have looked at similar files -
By Richard Chapman · #108518 ·
Re: introduction of a new vacuum tube spice model approach
Hi Andy Thanks for your detailed response. Tomorrow, I will find time to optimize that. I see now the problem of an overloaded page... regards, Adrian
By Adrian Immler · #108517 ·
Re: Problems using Pspice fet model for infineon BSR202N.
Richard wrote: "I've uploaded BB2.zip with the circuit, asy and model files." I think you made a mistake, because there is no BSR202N in that schematic. Also no "timestep too small" error. Must be the
By Andy · #108516 ·
Re: Behavioral source timestep limits ?
There are contradiction in real world ,too. If I just only study the textbook which contain lots math equations to describe the phenomemon of physics/electrics, etc. I tend to be confused, but if I
By ericsson.sunshine@... · #108515 ·
Re: Problems using Pspice fet model for infineon BSR202N.
I have found and used the BSR202N model and test circuit from Tony(?) The test circuit worked - but in my circuit - I ma getting similar results to that from my original version of the infineon model.
By Richard Chapman · #108514 ·
Re: Behavioral source timestep limits ?
Hello, Andy: The mentioned ideas was not from me, and not related to what I said about 'confidential'. Just a brief, sudden thoughts, but I certainly remembered that someone who had written some thing
By ericsson.sunshine@... · #108513 ·
Re: Phase Comparators
Hello, LTspice has a phase comparator named "phidet". It*s in the folder [Digital]. The deafult output curernt is 100uA. This current can be set to any other value with Iout=xxx. See the example
By Helmut Sennewald · #108512 ·
Phase Comparators
Would anyone be able to direct me towards some accurate phase comparator circuits that I could build within LTspice XVII? Thanks
By N K · #108511 ·
Re: Behavioral source timestep limits ?
I still don't know what the Bv is for. Since it represents an unreal component, are you thinking about using it to experiment with an altered circuit, before designing that "alteration" using real
By Andy · #108510 ·
Re: LTspiceXVII crashing
Marcel wrote: "Still, they are all schematics created by this particular user. Maybe he has a special lib, or uses specific LTspice features. It would help to see the smallest complete project that
By Andy · #108509 ·
Re: Problems using Pspice fet model for infineon BSR202N.
Hello Helmut, I agree in principle for transient simulations, but for DC sweeps it does make sense because the case to junction temperature difference would otherwise be zero, as you say. Regards,
By Tony Casey · #108508 ·
Re: Problems using Pspice fet model for infineon BSR202N.
Hello Tony, You shouldn't normally connect a V-source to the output TJ, because this pin is internally driven and shows the junction temperature. The output will be very different when you remove V4,
By Helmut Sennewald · #108507 ·
Re: Problems using Pspice fet model for infineon BSR202N.
richard@... wrote: "Are there any "tricks of the trade" translating Pspice models for use in LTspice? Not sure how to upload or share the models or ASC files. Happy to do so with
By Tony Casey · #108506 ·
Re: Problems using Pspice fet model for infineon BSR202N.
To upload, go to the web site, click on Files, scroll to Temp and click on Upload. Upload a ZIP archive (not any other sort) containing everything required to run the simulation, but not .raw or .log
By John Woodgate · #108505 ·
Problems using Pspice fet model for infineon BSR202N.
I am trying to use the Infineon supplied Pspice model for this part (BSR202N). I've created (found) a 5 terminal symbol to suit the model, but it makes no sense in an LTspice simulation. If I replace
By Richard Chapman · #108504 ·
Re: Behavioral source timestep limits ?
For example, (not adapted by me), the typically active PF controller makes the PF upto very high 99%, but after EMI filter circuit added, maybe some phase difference may be caused, those phase
By ericsson.sunshine@... · #108503 ·
Re: LTspiceXVII crashing
Still, they are all schematics created by this particular user. Maybe he has a special lib, or uses specific LTspice features. It would help to see the smallest complete project that crashes. -marcel
By marcelhendrix25 · #108502 ·