--- In LTspice@..., "Hao Fu" <fuhao@y...> wrote:
--- In LTspice@..., "Helmut Sennewald"
<helmutsennewald@y...> wrote:
Hello Hao,
this inverter has absolutely no problem in LTSPICE. May be you
have
selected some "bad" options in the control panel of LTSPICE.
Please
reset all options to its default values.
Control Panel->SPICE->Reset fo Defaults
Control Panel->Hacks-> Reset to Defaults
You must use the latest LTSPICE version 2.03f.
Then run the simulation and plot V(out) and Id(M1).
Please tell me your findings compared to HSPICE or even better
send
me the plot from HSPICE of V(out) and Id(M1).
email: HelmutSennewald@t...
I have attached my/your model file transistors.txt.
Best Regards
Helmut
I did the comparison. The ids look quite different between the 2
runs. Anyway, I have put the plots from Hspice run in the Files
folder, it's named inverter.ps.
Ok, the inverter experiment didn't fail completely in my runs
either.
I did get all the voltages and currents. But the Spice Error Log
still complains about Gmin stepping failures, that is what bothered
me.
Thanks,
Hello Hao,
thanks for the PDF-file. Indeed the current looks different.
I have written now a message to "Panama Mike"(Mike Engelhardt from
Linear Technology) and asked him to check the MOS model. Let's see
what he will tell us.
Best Regards
Helmut
