On Thu, Apr 10, 2025 at 10:57 PM, Andy I wrote:
I think your voltage source V1 is wrong.? Its sine wave amplitude is 1.2 V with a DC offset of 0.6 V, so it swings between -0.6 V and 1.8 V.? That goes low enough to violate the Absolute Maximum Input Common Mode Voltage Range, and Note 1 below the table.? You would be damaging the part.
In case I did not state this adequately, the concern is that you would literally fry U3.? Its input pin is being pulled well beyond U3's VEE supply voltage.
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It does not appear to affect the simulation's convergence problem that I see.? It might be only a hardware problem.? And that op-amp would distort pretty badly, so maybe it would also affect how well it simulated - if only it simulated at all.
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Andy
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