Hi, Andy:
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Your suggestions are absolutely correct!
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I just tried,?
1. Modify the PWL's Trise = 1u (from 10n), Tfall = 1u (from 10n), the peaks are eliminated.
2. modify R1 = 5.1K, C1=10nf with unchanged Trise, Tfall, the V(vout) has no peaks phenomemon ,too.
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Both works . Heil ! Viva! Banzai! Hooray! Live Looooooooong!
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Wish you happy & good healthy!
Best regards.
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On Thu, Mar 27, 2025 at 09:48 AM, Andy I wrote:
On Wed, Mar 26, 2025 at 04:46 AM, <ericsson.sunshine@...> wrote:
It looks like, different modeling topology of OPA will maybe show different behavior.
Quite probably not.
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Let's consider what makes these two integrators different.? ?I'm talking about U1 = LT1220 in "Lab 4 Integrator Square 500us with PWL.asc", versus U1 = MCP6001 in "triangle_gear.asc".
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In the first case, the square wave comes from a PWL voltage source with Tr = Tf = 10 ns.? In the second case, the square wave comes from a saturated op-amp comparator, with Tr = Tf = 7.7 us, nearly 1000 times slower.? One sends a 10 ns, 10 mA (1 MegAmp/us) current step to the integrator.? The second sends a 7.7 us, 10 uA (0.0000013 MegAmp/us) current step to its integrator.? That is 770 times slower and 1000 times smaller amplitude, or nearly 1,000,000 times smaller di/dt.? The slower speed gives the op-amp more chance to respond and recover.? If you plot the second integrator's d(V(tri_1)), you can see a combination of BOTH a ramp in its dv/dt (causing the peak to round), and smaller glitches at the start and end of the square wave's edges.? It is a mixture of effects.
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It should also be noted that the two circuits employ vastly different op-amps.? One uses a high-speed op-amp with 45 MHz GBP and SR = 250 V/us, and the other is a low-power op-amp with 1 MHz GBP and SR = 0.6 V/us.? It's like apples and oranges.? They do not compare well.
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I think it is likely that "different modeling topology" of the op-amps is not related to the different behaviors of the two circuits.
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Andy
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