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Re: LTspice XVII error work around #Time-step-too-small


 

Yes, I read all the advice and started out with a very low value for CSHUNT, but ended up with 5pF in order to get convergence. However, this was BEFORE I added the LT1375. Rather than a proper SMPS I was initially working with a switched load on the PTC, and then a Heath-Robinson arrangement of switches and pulse generators set up to do something SMPS-like in the simplest possible way, because the regulator I'm actually using (MCP16331T-E/CH) doesn't appear to have a SPICE model. So 5pF was not unreasonable. If I had stuck with 1e-15 I would still be tearing my hair out. However, having made some progress and achieved something that didn't look completely wrong, I then went on a search for something a bit like a MCP16331T-E/CH that had a model, in order to move a little closer to reality. I was not surprised to find I now had convergence problems again, but this time no matter what I did I either got no convergence at all, or LTSpice slowed to a crawl. But with CSHUNT removed and the timebase shift, I now have all six SMPS's working with the PTC in place, and I can see that it should pass the formal inrush current test by a significant margin, even though strictly speaking it doesn't have to (if the customer asks you to jump a hurdle, and doing so wont kill you, you jump the hurdle). Apart from the capacitor oddity, the model is now stable against changes. And yes, when I replaced one big capacitor with several capacitors in parallel I used ideal capacitors, not capacitors with parasitics. I might try again now I've made various changes.
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Regarding voltage/current sources, I gave the voltage source a series resistor. From what I've read, LTSpice will convert such voltage source to the equivalent current source before modelling commences, so I didn't do that manually.
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