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? Anyway I am biased ... as it takes me about 5 mins to write a single line of S/370 assembler not counting debugging!

Peter, When I first started work, I worked in small insurance UK insurance company. We had a Honeywell H3200, which basically ran IBM1401 code, but with "Improved io". We had one small program that

It was for a long time already that compilers made faster code because the human coders kept on choosing storage-to-storage instructions where the register based versions were faster. But in cases

All interesting ... and I will try out each candidate and report back. It will be tested only on Hercules so in one sense not a fair test. On the other hand we could argue that that Hercules is S/370

I wonder could this have been the COBOL compiler abusing MVCL instructions in situations where they were not the appropriate instructions to use? Perhaps instructions such as MVCL would be expected to

Dave, I'm acutely aware of that IBM advice, but in the last two decades I have also been involved in multiple rounds of "MIPS-saving" projects when management wanted application teams to "do more with

Peter, I tend not to worry about performance, but any way I believe that IBM current advice is don't try and instruction timings disappeared from the manuals yonks ago. For example early 9370 were

Because I did not remember that MVCL was available at the 370 architecture level (and failed to go look it up) and because MVCL has mostly been quite slow at the real-iron hardware level. Of course,

The other thing to remember about mvcl is that it is interruptible. René.

Adrian, Like so many things, it depended on how it was used.? MVCL was probably used more to clear storage or fill it with some character way more often than to actually move data from A to B.? The

It is true that the performance will be measured on Hercules. So is MVCL really that bad on real hardware? A

On Tue, 2020-04-14 at 08:32 +0100, Peter Coghlan wrote: > > > > As an academic exercise, two assembler alternatives attached as > text files. > > > >? > > > > MEMSET.txt uses STC/MVC to set 256 bytes

LA R15,0(R15) would add 0 to the value of R15. I dont think thats what you want. Joe adrian@...> wrote:

At the moment the stubs (linked to the client program) look like this: EXTRN GCCANCHR VFPRINTF CSECT USING VFPRINTF,R15 L? ? ?R15,=V(GCCANCHR) get anchor ptr L? ? ?R15,0(R15)? ? ? ?get the

Why don't you suggest using an MVCL instruction?

Thanks Peter ... I will light up both and provide relative performance stats. Also (and this shows how much stuff is just there in the public domain) have a look at this.

As an academic exercise, two assembler alternatives attached as text files. MEMSET.txt uses STC/MVC to set 256 bytes at a time and then STC and variable-length MVC to set the remainder less than 256

In 2020 we are all allowed to be grumpy! Its not my biggest concern (bytewise IO is that) but it is an example where a s/370 assembler guru could spend 10 mins to smash it. Even in C I would try and

Adrian I am grumpy because I am trying to replace a web front end that only works on IE with compatibility mode on Internet Explorer with some ASP.Net that works on any platform…. Any way the code

DLMALLOC glued to GCCLIB - big step this is the father of "all" modern C/C++ memory management :-)