开云体育

I've been reading through my 123 Microcontroller Experiments by Myke Predko
and have a question about the interrupts he uses in his assembler code for
the 16F684. Like other PICs I am familiar with, the 16F684 seems to use 0x04
as the interrupt vector, but Myke doesn't seem to use it. Instead he just
repeatedly bit checks the INTCON flags. Doesn't the PIC jump to 0x04 anyhow
on an interrupt? What am I missing? Is it that he is clearing the interrupt
flag before the interrupt latency cycles have expired? If so, am I correct
that the newer PICs don't have such interrupt latency?



Here is a sample of the code:



btfss INTCON, T0IF

goto $ - 1

bcf Servo1Pin

movwf TMR0

bcf INTCON, T0IF





Is the PIClist dead? I tried to send a message there two weeks ago (twice
even) and it has not shown up. I may be on moderated status because I have
never posted there before, but I figured the moderator would have authorized
my post by now.





Thanks,

--- In Electronics_101@..., "Len Shelton" <len@...> wrote:

I've been reading through my 123 Microcontroller Experiments by Myke

Predko

and have a question about the interrupts he uses in his assembler

code for

the 16F684. Like other PICs I am familiar with, the 16F684 seems to

use 0x04

as the interrupt vector, but Myke doesn't seem to use it. Instead he

just

repeatedly bit checks the INTCON flags. Doesn't the PIC jump to 0x04

anyhow

on an interrupt? What am I missing? Is it that he is clearing the

interrupt

flag before the interrupt latency cycles have expired? If so, am I

correct

that the newer PICs don't have such interrupt latency?



Here is a sample of the code:



btfss INTCON, T0IF

goto $ - 1

bcf Servo1Pin

movwf TMR0

bcf INTCON, T0IF





Is the PIClist dead? I tried to send a message there two weeks ago

(twice

even) and it has not shown up. I may be on moderated status because

I have

never posted there before, but I figured the moderator would have

authorized

my post by now.





Thanks,

Len

[Non-text portions of this message have been removed]

Sure, but the PIC will only branch to the interrupt vector if
interrupts are enabled. He probably didn't do that because he wanted
to test the flags directly.

FWIW, some peripherals on some devices not only require GIE to be set
but they also require PEIE to be set.

Richard

So, the interrupt flags get set, even if interrupts are not enabled?

Then, in Myke's apps it makes perfect sense. In fact, that should nearly
eliminate interrupt latency.

Thanks. That's the piece that brings it full-circle for me.

--- In Electronics_101@..., "Len Shelton" <len@...> wrote:

Then, in Myke's apps it makes perfect sense. In fact, that should nearly
eliminate interrupt latency.

Thanks. That's the piece that brings it full-circle for me.

Len

So, the interrupt flags get set, even if interrupts are not enabled?

Yes, just like any other flags.

While you are at it, look around at some of the code on the Microchip
site. Some of it is quite good and uses more modern coding standards.

I don't have any of Myke Predko's books but some of the code by other
authors purporting to teach all about microcontrollers has the
absolute worst coding style on the planet.

If you see memory allocation like:

Var1 EQU 0x20
Var2 EQU 0x21
Var3 EQU 0x70

run away as fast as you can. Similarly, if you see EQUs used to
define registers and flags, run even faster.

In the first case, the CBLOCK - ENDC was invented to create and define
the contents of blocks of memory. Specific addresses within the
blocks are handled by the assembler.

In the second case, the code is probably not portable. The Microchip
assembler include files contain the only correct definitions for the
various registers and bits.

Just a little heads up...

Richard

--- In Electronics_101@..., "Leon Heller"
<leon.heller@...> wrote:

----- Original Message -----
From: "rtstofer" <rstofer@...>
To: <Electronics_101@...>
Sent: Saturday, October 07, 2006 7:16 AM
Subject: [Electronics_101] Re: PIC interrupts

In the second case, the code is probably not portable. The Microchip
assembler include files contain the only correct definitions for the
various registers and bits.

He also used

goto $-1

Leon
--
Leon Heller, G1HSM
Suzuki SV1000S motorcycle
leon.heller@...

Yes... It was late and I was thinking about mentioning that but I
fell asleep first.

PC relative branches (as in '$ - 1') are highly problematic when
trying to port the code to a pipelined architecture such as one of the
ARM processors. It isn't going to work and will take a lot of time to
debug.

It also complicates adding or removing statements from the loop -
assuming the target is more than 1 instruction away.

That coding style is so bad that I cringe every time I see it.
Besides serving as a perfectly good bad example, it will set
programming and new users back about 40 years.


Richard