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Hello All! I’m trying to create an SR flip-flop circuit with a clock in LTspice. To do this, I’m using the AND logic gate available under Component/Digital. I’m assuming it provides two output options: normal and inverted. Therefore, I’m using the inverted output to form a NAND gate. However, it’s not working. My Q output doesn’t match the truth table of this flip-flop. Could someone guide me? I’ve never created a digital circuit in LTspice before. I’ve attached the FlipFlop_SR_Clock circuit in Temp. Thank you!

Hey all, I'm very new to LTSpice. I designed a T-Type NPC converter on PLECS and wanted to design the EMI filter by using LTSpice to measure DM and CM noise. In order to have a simpler solution to control the converter, my idea was to export the gate drive signals from PLECS in ss and then use them on LTSpice. However, I see it's not that simple and my simulation stops after few us or gives me the singular matrix error (which I tried to fix by adding some grounds). I honestly have no clue what could be wrong. Can anyone at least point me in the right direction? The simulation files are on temp folder as 'pulses.7zip' Thanks in advance!

Ok so y'all caught an ancient 5457 model bug, that worked non the less before 24.1.x. Can you tell me what is wrong with the ancient TI TL074 model that has worked (though limited) forever until now? Worked in 24.0.x, does not work in 24.1.8 I have .include TL074.301 Just like all the other models. I get the error C:\Users\{USER}\Documents\LTspiceXVII\lib\sub\TL074.301(43): Expected device instantiation or directive here. ^ All other TI included models so far work. Model looks like this * TL074 OPERATIONAL AMPLIFIER "MACROMODEL" SUBCIRCUIT * CREATED USING PARTS RELEASE 4.01 ON 06/16/89 AT 13:08 * (REV N/A) SUPPLY VOLTAGE: +/-15V * CONNECTIONS: NON-INVERTING INPUT * | INVERTING INPUT * | | POSITIVE POWER SUPPLY * | | | NEGATIVE POWER SUPPLY * | | | | OUTPUT * | | | | | .SUBCKT TL074 1 2 3 4 5 * C1 11 12 3.498E-12 C2 6 7 15.00E-12 DC 5 53 DX DE 54 5 DX DLP 90 91 DX DLN 92 90 DX DP 4 3 DX EGND 99 0 POLY(2) (3,0) (4,0) 0 .5 .5 FB 7 99 POLY(5) VB VC VE VLP VLN 0 4.715E6 -5E6 5E6 5E6 -5E6 GA 6 0 11 12 282.8E-6 GCM 0 6 10 99 8.942E-9 ISS 3 10 DC 195.0E-6 HLIM 90 0 VLIM 1K J1 11 2 10 JX J2 12 1 10 JX R2 6 9 100.0E3 RD1 4 11 3.536E3 RD2 4 12 3.536E3 RO1 8 5 150 RO2 7 99 150 RP 3 4 2.143E3 RSS 10 99 1.026E6 VB 9 0 DC 0 VC 3 53 DC 2.200 VE 54 4 DC 2.200 VLIM 7 8 DC 0 VLP 91 0 DC 25 VLN 0 92 DC 25 .MODEL DX D(IS=800.0E-18) .MODEL JX PJF(IS=15.00E-12 BETA=270.1E-6 VTO=-1) .ENDS 

Hi, I just installed LTspice 24, I can use both old spice and new, they both work! I still need to auto generate the models used by old LTspice (to build the symbols) to be able to use them in LTspice 24, is there a way that I can use the models in the new LTspice 24 with out regenerating please? Regards, Suded

Howdy I finally got around to updating from 24.0.x to 24.1.x and a lot seems to have broken for me. Am I correct in assuming in 24.1 you cannot have a .include to a model you are not using? I tend to have a "template" for a type of work where I may define a pile of parts, but not always use them all. Up to now that has not been an issue but now I get an error like C:\Users\{user}\Documents\LTspiceXVII\lib\cmp\TL074.301(43): Expected device instantiation or directive here. I can change it to a comment and it works. I am also finding some of my legacy models that came from LT Spice no longer work. For example how can I fix this one? It's been working fine for nearly 20 years. C:\Users\{user}\Documents\LTspice\user.jft(1): Syntax error (unexpected input). .MODEL 2N5457 NJF(VTO=-1.8 BETA=0.00135 LAMBDA=0.001 RD=35 RS=31.5 + CGS=2.25E-12 CGD=6E-12 KF=6.5E-17 AF=0.5 ) ^^^^^^^^^ 

Hi All, I am having an issue wherein the netlist for simulations fails to complete one on computer. The specific simulation seems not to matter, but it is only an issue with larger simulations. The netlist (View -> SPICE Netlist) gets cropped short - sometimes in the middle of a line. It appears as if a character limit or something gets hit. eg: ... D1 N018 N017 BAT46WJ X§M4 N028 N029 0 SQ2308CES X§M6 N035 N036 0 SQ2308CES X§Q7 LOAD_DETECT_B N034 N032 BSR16 X§Q9 N009 N012 0 PMBTA45 X§Q3 N019 N021 0 PMBTA45 .model D D .lib C:\Users\djwnz\AppData\Local\LTspice\lib\cmp\standard.dio .model NMOS NMOS .model PMOS PMOS .lib C:\Users\djwnz\AppData\Local\LTspice\lib\cmp\standard.mos .tran 10000m * SEP_FET * POS_TERM .model MYSW the correct completion of this line would have been as follows and significantly more netlist should have followed it. .model MYSW SW(Ron=1 Roff=10Meg Vt=.5 Vh=-.4) The simulation then obviously fails to run as the netlist is not complete, the specific failure messages depend on what has been left out of the netlist file. This happens with a number of different schematics, but only ever on this one PC. The simulation itself runs fine on every other simulation that it has been tested on. The machine in question is running Windows 10 pro, and the PC has been restarted multiple times to try and get this to work. The machine is running LTSpice 24.1.8, and this has been reinstalled a couple of times, and older versions of LTSpice have also been installed to test. This issue has persisted through all of this. Does anyone have any idea what may be the casue of this issue, or what setting of my install or computer may be to blame? Thanks!

Hi , I found a core library file Transformers in our group's file folder In that specific file the core material I needed was T38 which was inside the library file - epocs core .MODEL T38 CORE (MS=359.767869K A=11.875703 C=1m K=8.195163) *** Core MnZn Material However I also wanted to know how these values inside the file was calculated or derived ? I tried using Jiles Atherton model from the B-H curve to get these parameters but what I get is slightly different from the above values Maybe Александр Бордодынов could answer me cause he is the one who uploaded the files It would be very helpful for me Best Regards,

Hi , I am trying to model the Ep10 core with T38 material from TDK micronas I have modelled the core but I am not sure whether it is correct or not ? How do I check my model ? Also it would be good if you could tell me if there are any pre defined core models for this THanks

My team wants to have a shared directory where all Electrical Engineers can place their symbols and libraries so others can re-use them instead of re-creating it. This is what the help doc says Search Paths This panel allows you to enter additional paths than the default to find symbols and libraries. When entering symbol and library search paths, list each directory on it's own line. This panel also allows you to edit the directory where user-defined discrete component libraries are located, in the field labeled "Location of user.* component library files." Questions: 1. Is the search recursive? I would imagine since the text says "list each directory on its own line" that it is not recursive. However one of my engineers says he has used a nested directory structure for his symbols for years 2. There is one top level to browse a location called "User libraries directory". Is this what I should be using to point to our shared location? If so, why would I need the "Symbol Search Path" and "Library Search Path" boxes that require one directory per line. 3. If someone edited a standard component will it take precedence if it is defined in one of these paths (presumably the "User libraries directory"? Thank you

Hello all, I am wondering if there is a way to deactivate a circuit or part of the circuit in LTspice before simulation. I used ADS and PSIM before and in these two simulators, there is a choice where you can deactivate the circuits, I go over the LTspice help manual quickly but there is nothing mentioned regarding this, any comments or hints from you all will help. Thanks

Hi all - quick bedtime question - I need to plot the group delay of a circuit multiplied by the frequency. Too tired to work out how to do it, nothing I've tried has worked. Is there a natty little trick in the plot window? Thanks -- K

Hi there, Maybe this question has already been asked, but I couldn't find it. Sorry for that. I am looking for multiple tabs/pages in the Waveform (results) window. One can easily add a plot pane above or below but it would be handy if one can add a tab en keep the number of panes limited to a small number. Is such thing possible? Regards, Jacco

All LTspice users should be familiar with UniversalOpamps. There are 7 different UniversalOpAmp models of increasing complexity capable of modelling almost any proprietary opamp to reasonable levels of accuracy in most regards, typically with superior convergence and speed within LTspice. I see quite a few people using opamps to model comparators, despite the requirements being quite different. It occurred to me this might be because there isn't an equivalent universal comparator. So I set out to change that. The UniversalComp is the simplest solution I could think of with just one B-source, and it features: Programmable Propagation Delay (trapped to prevent values <0) Programmable Hysteresis (trapped to prevent values <0) Rail-to-Rail Output Excellent convergence Blistering speed Infinite Common-mode Input Range I have also made two symbols, with the inputs reversed for drafting convenience, that are otherwise pin-wise compatible with the opamp2 and UniversalOpAmp symbols. The model and a test schematic is also available in Universal Comparator. -- Regards, Tony

I had an impression already that Linux/Wine is a faster platform for LTspice than Windows. Now I have a data point to demonstrate it. The file is uploaded, belka.asc . It is a simple RF mixer with a BJT audio amplifier. It runs 5ms of transient analysis. The simulated RF frequency is 4MHz. The LTSpice version is 24.0.12 on all 3 computers I compared. Windows computer is Asus Vero laptop, i5-1235U, 16GB RAM, Windows 11 with all latest updates. Linux computer 1 is Dell Precision 5530 laptop, Xeon E-2176M CPU (8th gen core), 32GB RAM Linux computer 2 is Asus ZenBook 14, i7-8565U, 16GB RAM The Linux OS on both is Mint 22.1, recently updated. Wine is the latest from the repository, no tweaks. Now to the numbers. I pushed the start button and timed it to the button turning green again. No traces displayed, no previous runs (fresh window). Windows : 1min 39s Linux 1 : 0min 21s Linux 2 : 0min 30s I tried to add a security exception for LTspice in Windows, so that the real-time antivirus is not in the way. It is known to slow down many applications. There was no noticeable difference. If you look at the single thread benchmarks for these CPUs, i5-1235U is expected to be about 50% faster than both of the 8th gen CPUs, although Xeon has similar multithreaded score. I invite other people to reproduce and to try different files. Mike

A new error seems to have crept into .MEAS directives on the 24.1 branch. Measurement names are apparently not now allowed to have a sign character in them, e.g.: .MEAS Tpd+ param T1-T0 .MEAS Tpd- param T11-T10 .. results in: I:\tony\Documents\Simulations\LTspice\Comparator\UniversalComp\Dev\UniversalComp_Test.net(37): syntax error .MEAS Tpd+ param T1-T0 ^^^^^^^^^^^^^ I:\tony\Documents\Simulations\LTspice\Comparator\UniversalComp\Dev\UniversalComp_Test.net(38): syntax error .MEAS Tpd- param T11-T10 ^^^^^^^^^^^^^^^ This has worked in all previous versions. In the logfile, normally it would show, e.g.: tpd+: t1-t0=1.08114e-08 tpd-: t11-t10=1.09962e-08 -- Regards, Tony

Which temporary file(s) do we need to keep, if we want to return to a model and execute one of several .meas scripts? Is there a way (maybe in batch mode?) to execute a meas script without re-running the simulation? I have several worst-case analysis models that take at least several minutes to run (8, 9, + variables). I’d like to run the meas scripts to extract different sets of measurements, drawn from one Run. At least in XVII, the Execute script command is only under the File menu on the Plot page… Thanks, Dave

using round to get better readable results (e.g. mV's with one further number after the dot) in the measurements does not work for me in AC measurements while it works fine for TRAN. running .AC the following statements bring the below listed results .OPTIONS meascplxfmt=polar .MEAS V_ACOMP_max_IC7_p18_mV PARAM (V_ACOMP_max_IC7_p18*1000*10)/10 .MEAS V_ACOMP_max_IC7_p18_mV_2 PARAM round(mag((V_ACOMP_max_IC7_p18*1000*10)/10)) .MEAS AC V_ACOMP_max_IC7_p18_mV_3 PARAM round(mag((V_ACOMP_max_IC7_p18*1000*10)/10)) leads to v_acomp_max_ic7_p18_mv: (V_ACOMP_max_IC7_p18*1000*10)/10=(24.2389660125,0?°) v_acomp_max_ic7_p18_mv_2: round(mag((V_ACOMP_max_IC7_p18*1000*10)/10))=(0,0?°) v_acomp_max_ic7_p18_mv_3: round(mag((V_ACOMP_max_IC7_p18*1000*10)/10))=(0,0?°) In former versions e.g. 24.0.12 using round() even crashed and said: this is a bug, please report it. Now with 24.1.8 it does not crash but reports zero...but maybe I am doin wrong because I don't get converted (not even with mag() ) this cartesian numbers to normal values. Also the ASCII character in front of ° looks weired since new version installed.

Hi, I am designing a Step-up Booster based on LT1680, for some reasons: 1)Suitable for high power; 2)Through hole package; 3)Simple external architecture. However, there is a discrepancy between the Datasheet and the LTspice component. It seems there is a mistake with the LTspice file that has only 14 pins while the real component has 16 and some pin names in LTspice are called differently. Can anyone please help me? Thanks

Hello everyone! I'm building a PWM control circuit for my single-phase inverter. I started by creating the control stage using a triangular wave source (Vp) and a DC source (Vc). I included an inverting op-amp to invert the triangular wave, and the buffer at the comparator’s output is meant to isolate the signal. After completing the setup, I tested it and noticed that the output from my comparator was a triangular waveform with a peak-to-peak voltage in the megavolt range, which is obviously incorrect. Then I imported my inverter circuit and connected it to the comparator’s output to see if anything would change, but it still doesn't work properly. Could someone help me figure out where I might be going wrong? Could it be that the generic op-amp I'm using isn't suitable for this circuit and I should use a different model? If so, which one? I will upload my .asc file named invmono_controle to the library. Feel free to test it. Thank you!

All, I replaced my "Pease MFB BP filter (2).zip" so that it includes the missing UniversalOpAmp1.lib file and created this topic to track it. Tim [Moderator's note: The filename has been changed to "Pease MFB BP filter (Tim Hutcheson).zip".]