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Does anyone know what its means when LTspice give error:
"Singular matrix: check node n002
Iteration No. 1"

The circuit is made by AC voltage source, resistor (series with the voltage
source), bridge rectifier, capacitor, resistor paralleled with the capacitor
as a load at the output, and ground. The circuit is plotting and simulating
just fine for small value of capacitor. But when I increase the capacitor
value above 16uF, LTspice give the above error. But for some capacitor
values (eg. 20uF) it's fine again, and when I increase it again (eg.21uF),
it gives error again. So LTspice gives error for most of capacitor value
above 16uF but not all.. Also, for some value, it simulating but then the
plot stops in the middle. The value of the capacitor that gives an ok plot
and error are randoms (no pattern). So does anyone know, what's the reason
that the LTspice behaves like this?

Thanks in advance..

Kind regards,
Micheline

--- In LTspice@..., Tan Micheline Tambayong <micheline.tambayong@...> wrote:

Does anyone know what its means when LTspice give error:
"Singular matrix: check node n002
Iteration No. 1"

The circuit is made by AC voltage source, resistor (series with the voltage
source), bridge rectifier, capacitor, resistor paralleled with the capacitor
as a load at the output, and ground. The circuit is plotting and simulating
just fine for small value of capacitor. But when I increase the capacitor
value above 16uF, LTspice give the above error. But for some capacitor
values (eg. 20uF) it's fine again, and when I increase it again (eg.21uF),
it gives error again. So LTspice gives error for most of capacitor value
above 16uF but not all.. Also, for some value, it simulating but then the
plot stops in the middle. The value of the capacitor that gives an ok plot
and error are randoms (no pattern). So does anyone know, what's the reason
that the LTspice behaves like this?

Thanks in advance..

Kind regards,
Micheline

Hello Micheline,

This error message simply means that LTspice couldn't solve
the matrix. Maybe your circuit has an open nets.

Please upload your circuit to this group for a test to the
following location.

Files > Temp > yourcircuit.asc



Best regards,
Helmut

Hi Helmut,
Thanks for the reply. I already uploaded the file under name
Pefficiency_analysis.asc.
Please try to simulate the power in V1 and power in R1 since I am analyzing
the Power efficiency (Pout/Pin) of the circuit. Also if you try to simulate
using C = 16uF it's simulating just fine but it gives error when you try C =
17uF... You can try other value of C as well. It gives error for only some
values of C above 16uF.
Hope you can find out why it behaves as such..
Thanks so much for the help

Kind regards,
Micheline

Hi Micheline,

Could you please post the circuit schematics, Symbols, and models and all relevant files in the Temp files of this group ? It is a lot easier with a schematic to troubleshoot.

Best regards,

Michael




To: LTspice@...
From: micheline.tambayong@...
Date: Mon, 19 Sep 2011 15:21:03 +1000
Subject: [LTspice] SPICE Error






Does anyone know what its means when LTspice give error:
"Singular matrix: check node n002
Iteration No. 1"

The circuit is made by AC voltage source, resistor (series with the voltage
source), bridge rectifier, capacitor, resistor paralleled with the capacitor
as a load at the output, and ground. The circuit is plotting and simulating
just fine for small value of capacitor. But when I increase the capacitor
value above 16uF, LTspice give the above error. But for some capacitor
values (eg. 20uF) it's fine again, and when I increase it again (eg.21uF),
it gives error again. So LTspice gives error for most of capacitor value
above 16uF but not all.. Also, for some value, it simulating but then the
plot stops in the middle. The value of the capacitor that gives an ok plot
and error are randoms (no pattern). So does anyone know, what's the reason
that the LTspice behaves like this?

Thanks in advance..

Kind regards,
Micheline

[Non-text portions of this message have been removed]






[Non-text portions of this message have been removed]

--- In LTspice@..., Tan Micheline Tambayong <micheline.tambayong@...> wrote:

I already uploaded the file under name Pefficiency_analysis.asc.

Methode how to calculate efficiency is missing.

Please notice that R1 is not connected to gnd. I suppose you calculated like this: voltage should be: V(n003)-V(n004). Current is I(R1) so power is (V(n003)-V(n004))*I(R1)
Divide Output power by input power?...

Your uploaded simulation works for me.

hws

--- In LTspice@..., Michael Peter Kiwanuka <michael883575@...> wrote:

Could you please post the circuit schematics, Symbols, and models and all relevant files in the Temp files of this group ? It is a lot easier with a schematic to troubleshoot.

Schematic is uploaded, but the calculation is missing.
Temporary P(in) is zero (as capacitor is already loaded and I(in) is zero.)

That may cause a division by zero.

hws

--- In LTspice@..., Tan Micheline Tambayong <micheline.tambayong@...> wrote:

Hi Helmut,
Thanks for the reply. I already uploaded the file under name
Pefficiency_analysis.asc.
Please try to simulate the power in V1 and power in R1 since I am analyzing
the Power efficiency (Pout/Pin) of the circuit. Also if you try to simulate
using C = 16uF it's simulating just fine but it gives error when you try C =
17uF... You can try other value of C as well. It gives error for only some
values of C above 16uF.
Hope you can find out why it behaves as such..
Thanks so much for the help

Kind regards,
Micheline


On Mon, Sep 19, 2011 at 4:32 PM, Helmut <helmutsennewald@...> wrote:

**




--- In LTspice@..., Tan Micheline Tambayong
<micheline.tambayong@> wrote:

Does anyone know what its means when LTspice give error:
"Singular matrix: check node n002
Iteration No. 1"

The circuit is made by AC voltage source, resistor (series with the

voltage

source), bridge rectifier, capacitor, resistor paralleled with the

capacitor

as a load at the output, and ground. The circuit is plotting and

simulating

just fine for small value of capacitor. But when I increase the capacitor
value above 16uF, LTspice give the above error. But for some capacitor
values (eg. 20uF) it's fine again, and when I increase it again

(eg.21uF),

it gives error again. So LTspice gives error for most of capacitor value
above 16uF but not all.. Also, for some value, it simulating but then the
plot stops in the middle. The value of the capacitor that gives an ok

plot

and error are randoms (no pattern). So does anyone know, what's the

reason

that the LTspice behaves like this?

Thanks in advance..

Kind regards,
Micheline

Hello Micheline,

This error message simply means that LTspice couldn't solve
the matrix. Maybe your circuit has an open nets.

Please upload your circuit to this group for a test to the
following location.

Files > Temp > yourcircuit.asc



Best regards,
Helmut

Hello Micheline,

Your circuit won't converge because of the ideal diode model. If you add Roff=10Meg to the model, it fixes the convergence issue.

Regards,
Tony

Hi,



The GND is in the wrong place.

Please see corrected circuit in TEMP folder



Regards


_____

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Hi,
thanks so much for helping me solving the problem.. But both solution
(adding Roff and changing the ground position) are giving different results.
So I wonder which one should I use.

Also Tony, can you please explain to me what's actually Roff do in the
diode?

Thanks so much everyone..

Kind regards,
Micheline

On Tue, Sep 20, 2011 at 9:46 AM, Ian <iw1904@...> wrote:

**


Hi,

The GND is in the wrong place.

Please see corrected circuit in TEMP folder

Regards

_____

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SPAMfighter has removed 3438 of my spam emails to date.

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>
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[Non-text portions of this message have been removed]

--- In LTspice@..., Tan Micheline Tambayong <micheline.tambayong@...> wrote:

Hi,
thanks so much for helping me solving the problem.. But both
solution (adding Roff and changing the ground position)
are giving different results.
So I wonder which one should I use.

Also Tony, can you please explain to me what's actually
Roff do in the diode?

Thanks so much everyone..

Kind regards,
Micheline

Hello Micheline,

The result of both solutions is the same.
Please take a look to the enhanced version.

Files > Temp > Pefficiency_analysis-1_abc.asc

You have to plot the voltage difference V(a,b) at the output
and not the single signal V(a).

Best regards,
Helmut

--- In LTspice@..., "Ian"<iw1904@...> wrote:

Hi,



The GND is in the wrong place.

Please see corrected circuit in TEMP folder



Regards


_____

I am using the Free version of SPAMfighter <>
.
SPAMfighter has removed 3438 of my spam emails to date.

Do you have a slow PC? <>
Try free scan!

Ian,

With respect, we don't know for sure where the circuit should be grounded, as we don't know what the application is. Perhaps the rectified bit should be floating?

Regards,
Tony

<Snip>
--- In LTspice@..., Tan Micheline Tambayong <micheline.tambayong@...> wrote:

Hi,
thanks so much for helping me solving the problem.. But both solution
(adding Roff and changing the ground position) are giving different results.
So I wonder which one should I use.

Also Tony, can you please explain to me what's actually Roff do in the
diode?

Thanks so much everyone..

Kind regards,
Micheline

</snip>
Hello Micheline,

All of the parameters of the diode model are explained in the LTspice>Circuit Elements>Diode section of the Help.

Regards,
Tony