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Hello. I am trying to simulate the loop gain of this kind of amplifier but i cant. i want to find gain margin and phase margin.can you help?

I uploaded LTspice file in temp folder here: ?

Hello. I am trying to simulate the loop gain of this kind of amplifier but i cant. i want to find gain margin and phase margin.can you help?


I uploaded LTspice file in temp folder here:

the file i posted is at?Files > Temp

named Singleton amplifier loop gain simulation(Gain & phase margins).asc

the file i posted is at?Files > Temp


named Singleton amplifier loop gain simulation(Gain & phase margins).as

John,

R1 is a bias resistor to ensure?Q2s collector current is sufficient.? It also provides a path to discharge Q7s base when the AC voltage swings down.? C1 reduces the bandwidth of Q7.

Rick

well what i want to do is to evaluate the circuit's gain and phase margins as described in ltspice educational examples Loopgain.asc ,Loopgain2.asc .But with this kind of topology i post,i dont know how to apply the technics?in? Loopgain.asc ,Loopgain2.asc examples.?

R1 is a bias resistor to ensure?Q2s collector current is sufficient.?
It also provides a path to discharge Q7s base when the AC voltage
swings down.? C1 reduces the bandwidth of Q7.

John,

Yes, we are looking at different files. I looked at the one posted by vegetat55 to the temp folder. It is an .asc file but the extension doesn't show up so I had to save it, and rename it to add the extension.

Rick

Hello,

You can figure out how to apply loopgain analysis to this circuit by considering the base of the input transistor as the positive input to a differential?amp and the emitter of it as the negative input of the amp.? Looking at this way you can see that the circuit is analogous to a noninverting op amp configuration.

Rick