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Four switch non inverting buck boost converter not converging


 

Hello everyone,
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I am trying to simulate Four switch non inverting buck boost converter with two different genesic switches G3R60MT07J and G3R75MT12J. The library files are encrypted, so I cannot make any changes there. I have tried various methods like increasing time step and tolerances, skipping initial operating point solution etc. but nothing is working for me. Any suggestions regarding how to resolve this issue?


 

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On 21/03/2025 15:19, hetals via groups.io wrote:
I am trying to simulate Four switch non inverting buck boost converter with two different genesic switches G3R60MT07J and G3R75MT12J. The library files are encrypted, so I cannot make any changes there. I have tried various methods like increasing time step and tolerances, skipping initial operating point solution etc. but nothing is working for me. Any suggestions regarding how to resolve this issue?
What exactly is going wrong? What is the error message? If you want informed suggestions, you will probably have to upload your schematic with all models and symbols in a zip to Files > Temp.

In the meantime, are you sure the models are encrypted for LTspice and not some other simulator, like PSpice? If it's encrypted for one, it won't work in another.

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Regards,
Tony


 

Hi,
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LT spice is showing issue with random nodes in the simulation anytime I change settings or add some resistance or make any change. I have attached the link for simulation file too.??
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For example, Convergence Failure: ?Time step too small; time = 1.43435e-08, timestep = 1.25e-19: trouble with instance s1
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Best regards
Hetal?


 

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Your schematic shows the 350V source connected through 0.1 ohm to the 10 ohm load. That can't be right.

On 2025-03-21 15:14, hetals via groups.io wrote:
Hi,
?
LT spice is showing issue with random nodes in the simulation anytime I change settings or add some resistance or make any change. I have attached the link for simulation file too.??
?
For example, Convergence Failure: ?Time step too small; time = 1.43435e-08, timestep = 1.25e-19: trouble with instance s1
?
?
?
?
Best regards
Hetal?
--
OOO - Own Opinions only If something is true: * as far as we know - it's science *for certain - it's mathematics *unquestionably - it's religion

Virus-free.


 

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On 21/03/2025 16:14, hetals via groups.io wrote:
LT spice is showing issue with random nodes in the simulation anytime I change settings or add some resistance or make any change. I have attached the link for simulation file too.??
?
For example, Convergence Failure: ?Time step too small; time = 1.43435e-08, timestep = 1.25e-19: trouble with instance s1
?
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One tip for the future: put all models and symbols in the same folder as the schematic. The schematic can't be open properly without copying the symbol L3_GeneSiC_MTseries_TO-263-7.asy into the top level directory. Also, don't use an absolute path for the models, because it only exists on your PC.

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Regards,
Tony


 

I wonder if the 10 ohm resistor is not the load.? Maybe the converter's output load is R3, the 0.09669 ohm resistor in series with the choke, between the two sets of switching transistors.
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Those two "1pf" resistors, R8 and R9, look badly misplaced.? That begs the question, "WTF"?? What were you thinking?? Obviously they are not 1 picofarad capacitors, but they are 1 picoohm resistors, which are about as close to short-circuits as you can get!
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This circuit makes no sense as it is drawn.? There is little wonder there were problems trying to simulate it.
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Andy
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On Fri, Mar 21, 2025 at 10:19 AM, <hetals@...> wrote:
I am trying to simulate Four switch non inverting buck boost converter with two different genesic switches G3R60MT07J and G3R75MT12J.
You are mistaken.? There is only one kind of switching transistor in the schematic, the G3R60MT07J.? If you meant for some of them to be G3R75MT12J, you forgot to add them to your schematic.
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Andy
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On Fri, Mar 21, 2025 at 11:14 AM, <hetals@...> wrote:
LT spice is showing issue with random nodes in the simulation anytime I change settings or add some resistance or make any change.
Those errors suggest that you made sloppy mistakes.? I don't know what settings you changed, but they should not have caused any errors about random nodes.? Adding resistors also would not cause an error like that, unless you did not connect to the parts.? I think you need to pay more attention to how you drew your schematic.
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What settings did you change?? Where did you try to add resistors?? Can you upload your schematic that failed with those errors?
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It should not be necessary to change anything inside the encrypted LTspice model.? It models just the MOSFETs.? Think of them as if they are "black boxes".
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Please do not upload things that are not needed for the simulation.? The extra transistor symbols and the PDF file should not have been uploaded.
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Andy
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On 21/03/2025 16:14, hetals via groups.io wrote:
LT spice is showing issue with random nodes in the simulation anytime I change settings or add some resistance or make any change. I have attached the link for simulation file too.??
?
For example, Convergence Failure: ?Time step too small; time = 1.43435e-08, timestep = 1.25e-19: trouble with instance s1
There are a number of obvious things wrong:

  1. The left-hand pair of gate drive signals are complementary, but have no dead zone, so both devices will conduct at transitions.
  2. The right-hand pair are identical, so both devices are on ~22% of the time and will short out the supply rail.
So firstly, remove the transistors and fix the gate drive waveforms. Then try adding the transistors.

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Regards,
Tony


 

hetals,
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Some more recommendations about your schematic to consider:
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(1)? Figure out what the basic circuit should look like.? Is R2 the load?? Why does the DC power source connect to both pairs of switching transistors, and to the load?? I suspect the wire between the top of S1 and the top of S3 should not be there.
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(2)? Tony pointed out that the gate drive waveforms are not right.
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(3)? Consider removing the 1m resistors, R14, R11, R12, and R13.? The MOSFETs provide a low resistance connection already between their S and KS terminals.
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(4)? Consider removing R10.
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(5)? It looks like you wanted R8 and R9 to be capacitors.? If so, either change them to capacitors, or remove them entirely.
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(6)? Remember that L1 already has 1 mΩ internally.? If you wanted L1's DC resistance to be 0 ohms, you must set it to 0.
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(7)? Don't use UIC unless you absolutely need it.? If you need it, prepare to make some adjustments.? Two of your MOSFETs are below ambient temperature (<1°C) because of UIC.? The error is small, but probably not what you wanted.
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(8)? The other two MOSFETs run exceedingly hot.? They approach 42000°C and 14000°C by the end of the 1 ms simulation.? They would vaporize.
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Andy
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