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dflops?


David Pariseau
 

I'm trying to use the dflop part in a simple
circuit and am having difficulty getting it
to work.

+-----------+
0-6v square wave --------|>CLK Q |--- 1v solid out??
GND----| D Q'|
+-----------+

Both the CLR and the PRE inputs are floating
though I've tried tieing them up and down.

There doesn't seem to be anywhere to attach
power to the device? There is a common pin
(COM?) on the corner, but leaving it open or
tieing it to ground has the same effect.

I'm looking for a 5-6v output. The 160 example
has dflops in it and seems to work fine, which
is beyond me.

Any ideas?
Thanks,
David Pariseau.


 

David,

I'm trying to use the dflop part in a simple
circuit and am having difficulty getting it
to work.

+-----------+
0-6v square wave --------|>CLK Q |--- 1v solid
out??
GND----| D Q'|
+-----------+

Both the CLR and the PRE inputs are floating
though I've tried tieing them up and down.

There doesn't seem to be anywhere to attach
power to the device? There is a common pin
(COM?) on the corner, but leaving it open or
tieing it to ground has the same effect.

I'm looking for a 5-6v output. The 160 example
has dflops in it and seems to work fine, which
is beyond me.

Any ideas?
There's some special things you need to know
about the gates.

The gates don't need external power. If you
want a gate to switch between 0 and 5 volts,
give the gate a value of "Vhigh=5" Vlow
defaults to 0V.

Also, all unconnected inputs are connected to
the gate's common node(that extra pin that is
tied to ground in the examples). This
connection flags that pin as unused and is
removed from the simulation. Note that the
common pin will be connected to ground by the
netlister if it is left floating. So, say you
place an AND gate on the schematic, connect one
of it's input to a signal, one input to ground
and leave the other 3 inputs floating. The
AND's output will follow the signal because
all the other pins aren't floating or grounded,
but flagged as not part of the simulation.

--Mike

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David Pariseau
 

Mike,

There's some special things you need to know
about the gates. The gates don't need external
power. If you want a gate to switch between
0 and 5 volts, give the gate a value of
"Vhigh=5" Vlow defaults to 0V.
I figured it was something like this. How do I
set Vhigh=5 for a particular gate??? I was looking
for something like this. It would have to be in a
particular instance right, not at the component level.

Also, all unconnected inputs are connected to
the gate's common node(that extra pin that is
tied to ground in the examples).
Fair enough, that makes things easier. Are the
PRE and CLR inputs active high? Can you tell this
by looking at the component? I wasn't able to find
any documentation on the flip-flop via help, etc...

Thanks for the help,
Dave Pariseau.


 

David,

There's some special things you need to know
about the gates. The gates don't need external
power. If you want a gate to switch between
0 and 5 volts, give the gate a value of
"Vhigh=5" Vlow defaults to 0V.
I figured it was something like this. How do I
set Vhigh=5 for a particular gate???
Place a gate on a schematic. Right mouse click
on the body. Click on Value, Value2, SpiceLine,
or SpiceLine2. Type Vhigh=5 in the box above
the grid thing that looks like a spread sheet
of the component's attributes.

--Mike

__________________________________________________
Do you Yahoo!?
Yahoo! Platinum - Watch CBS' NCAA March Madness, live on your desktop!


David Pariseau
 

Mike,

Place a gate on a schematic. Right mouse click
on the body. Click on Value, Value2, SpiceLine,
or SpiceLine2. Type Vhigh=5 in the box above
the grid thing that looks like a spread sheet
of the component's attributes.
Thanks, that did the trick.

Dave.