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Crystal oscillator oscillation startup


 

On Sun, May 4, 2025 at 10:46 AM, Cheng Fei Phung wrote:
May I ask how to resolve the issue for floating node N004 ?
You might not need to, since LTspice resolves that problem for you, by connecting a 1T resistor (GFLOAT) from that net to ground.? Note that the message is a Warning, not an Error, and it fixes it and proceeds with the simulation.
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If 1 Tohms is not big enough, you can change the value of GFLOAT (.options GFLOAT=1e-15).? This resistor adds damping and reduces the Q of your crystal's equivalent circuit.? It might be insignificant in this case, but that might not always be true.? Also there are cases where adding a single resistor disturbs the balance of a balanced circuit - so it might (sometimes) be better to fix this problem yourself (instead of letting LTspice), by adding appropriate resistor(s), so that every circuit node has at least one DC path to ground.
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If you want to fix the problem yourself, add a very big resistor from the node to ground, or to another voltage if there is one that is better than ground.
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In your circuit, nodes Q1, N004, and N005 all lack a DC path to ground.? They have a DC path to each other.? They are isolated from ground by C1, C6, C7, and C8 on one end, and by C3 on the other end.
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LTspice picks one of those three nets (not quite arbitrarily) and adds GFLOAT between that net and ground, which fixes the problem for all of them because they share a DC path to each other.
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Note: The series RLC circuit or Figure 2(b) is an equivalent model of Figure 2(a) inside the IEEE paper.
Perhaps.? But neither is equivalent to the crystal model in Figure 1 in the paper.
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I rarely ever see cases where a crystal needs to be modeled in SPICE as more than two resonant circuits (series and parallel), and one is usually sufficient.? I wonder if the model in Figure 1 was supposed to represent the first three harmonics?? If that is the case, one might be able to omit the other harmonics.? Crystal oscillators can be tricky and under the right circumstances they can oscillate on an unintended harmonic.? Good oscillator circuits are designed to suppress the other harmonics.
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Andy
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@Andy
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> I rarely ever see cases where a crystal needs to be modeled in SPICE as more than two resonant circuits (series and parallel), and one is usually sufficient.

In this case, shall I use the or ?


 

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Note : The oscillation amplitude is a bit too small during stable phase, not sure how to fix it properly yet.
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Cheng Fei Phung,
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I apologize for not replying sooner.? I was taking a look at your original oscillator circuit (with the schematic borrowed from a paper at the ieeexplore.ieee.org website).? I do not believe that schematic is workable as an oscillator, when using the transistor models and sizes that you have provided.? I think the oscillator transistor lacks sufficient gain.? Also, some transistors seem to be biased incorrectly as they do not behave according to your annotations.? I was generating curves in LTspice to illustrate.? But alas, life got in the way for me and I was delayed.
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Have not yet seen your latest version.
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Andy
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On Sun, May 11, 2025 at 09:31 PM, Cheng Fei Phung wrote:
Just an FYI - it is not "attached".? It is "uploaded".? Nothing was attached to the message.
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That is the correct way to do it.? It was just stated wrongly.
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Andy
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On Mon, May 12, 2025 at 10:43 AM, Andy I wrote:
some transistors seem to be biased incorrectly as they do not behave according to your annotations
Which transistors are incorrectly biased, if I may ask ?
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I did not change much the asc circuit file, I had been doing some study on the circuit operation details theory.


 

On Mon, May 12, 2025 at 12:33 AM, Cheng Fei Phung wrote:
Which transistors are incorrectly biased, if I may ask ?
The ones said to be in weak inversion zone so that they act as a very large resistor.? I do not know if it is a problem with biasing, or with sizes.

I did not change much the asc circuit file, I had been doing some study on the circuit operation details theory.
What changed, that makes it oscillate now?
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Andy
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@Andy?
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Did I measure wrongly or had the wrong circuit connections compared to the circuit proposed in the IEEE paper ?


 



On Monday, May 12, 2025 at 11:13:27 AM CDT, Cheng Fei Phung via groups.io <feiphung@...> wrote:


@Andy?
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Did I measure wrongly or had the wrong circuit connections compared to the circuit proposed in the IEEE paper ?