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full adder

amina alhees
 

hello i implement the circuit shown below ¡°one bit full adder with using cmos nand gate only but their is a mistake it does not satisfied the truth table i need some one help me to figure out what is the mistake please
 

amina alhees wrote:

? ? "hello i implement the circuit shown below"

Read the instructions again for this group.? They are on the group's webpage, and in the email message you received when you joined the group.? Files and pictures must never be attached to messages in the group.? Yahoo automatically removes them.

Upload your schematic to the "Temp" folder:
? ? neo/groups/LTspice/files/%20%20Temp/
Navigate to that folder first, then click the "Upload" button.? If it's a schematic, upload the .ASC file, not a picture of the schematic.? If your schematic uses other symbols or models that did not come with LTspice, then first zip them into one .ZIP file (that's .ZIP!? not .RAR or .7z or something else), and upload that .ZIP file.

Can you trace through the lines of the truth table, probing all the voltages, to see why it does not satisfy the truth table?

Regards,
Andy
 

Hello,

I got the schematic in a private email.

I guess many users had done the same mistakes one time.

1. A common mistake
The source of the PMOS is the pin near the gate. You overlooked that.
Rotate all PMOS and mirror them.

2. Sometimes one think too much in 1 and 0
The input signal A, B and CIN need 0V and 5V, because you have 5V VDD.

?
Best regards,
Helmut
amina alhees
 

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Thank you Andy i figured the mistake?

Amina Alhees

On Dec 6, 2018, at 11:51 AM, Andy ai.egrps@... [LTspice] <LTspice@...> wrote:

?

amina alhees wrote:

? ? "hello i implement the circuit shown below"

Read the instructions again for this group.? They are on the group's webpage, and in the email message you received when you joined the group.? Files and pictures must never be attached to messages in the group.? Yahoo automatically removes them..

Upload your schematic to the "Temp" folder:
? ? neo/groups/LTspice/files/%20%20Temp/
Navigate to that folder first, then click the "Upload" button.? If it's a schematic, upload the .ASC file, not a picture of the schematic.? If your schematic uses other symbols or models that did not come with LTspice, then first zip them into one .ZIP file (that's .ZIP!? not .RAR or .7z or something else), and upload that .ZIP file.

Can you trace through the lines of the truth table, probing all the voltages, to see why it does not satisfy the truth table?

Regards,
Andy

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