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arbitrary solar cell model
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--- In LTspice@..., "hamed" <l0st_l0rd@...> wrote:
Hamed, No one is interested in a .cir file. If you want help, convert it to an .asc file and post that to the Files>Temp folder of this group. Rick |
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John Woodgate
In message <krg4eh+9gdc@...>, dated Tue, 9 Jul 2013, sawreyrw <sawreyrw@...> writes:
No one is interested in a .cir file. If you want help, convert it to an .asc file and post that to the Files>Temp folder of this group.The file will run and 'Pick visible traces' allows output node voltages to be plotted. Both outputs have serious problems, output 2 is stuck at 0 V but output 1 'blows up' to quasi-infinite voltage. Some people can read netlists well, but I can't. -- OOO - Own Opinions Only. See www.jmwa.demon.co.uk Why is the stapler always empty just when you want it? John Woodgate, J M Woodgate and Associates, Rayleigh, Essex UK |
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Thanks friends for your responses but the point is that converting this circuit to schematics will make it more confusing.
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actually the output should not have the distortion in -1.8kA ! and it should continue constant like a diode :) kind regards Hamed --- In LTspice@..., John Woodgate <jmw@...> wrote:
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John Woodgate
In message <krgsbq+nfo3@...>, dated Tue, 9 Jul 2013, hamed <l0st_l0rd@...> writes:
Thanks friends for your responses but the point is that converting this circuit to schematics will make it more confusing.It couldn't possibly do so. If you want more help, please post the schematic. -- OOO - Own Opinions Only. See www.jmwa.demon.co.uk Why is the stapler always empty just when you want it? John Woodgate, J M Woodgate and Associates, Rayleigh, Essex UK |
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--- In LTspice@..., "Hamed" <l0st_l0rd@...> wrote:
Is there some reason you model must be so complicated and do you really need to reinvent the diode model? Couldn't you do something like the following and put all us, your fellow group members and involuntary consumers of SPAM, out of our collective misery? [Or you could just feed us wafer-thin after-dinner mints... Gurgle, burp... Nah, I couldn't eat another thing, I'm absolutely stuffed! Now, SPAM off!] * Simple yet effective PV Array model (typical values) * * Rp sets voltage slope of curve * Rs sets current slope of curve * Isc is short circuit current * n = number of series cells * m = number of parallel strings .param Rp=1 Rs=3m Isc=10 n=60 m=1 I1 0 1 {Isc*m} D1 1 0 cell n={n} m={m} Rp 1 0 {Rp*n/m} .model cell d Rs={Rs} Is=315n n=1.26 Cjo=50u Tnom=25 Trs1=10m Trs2=0m1 |
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Thank you very much dear friend( you did not mention your name)
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The fact is that here I cannot use the standard diode model while it is temperature dependent diode so I should mention the diode property. the point is that I should not see the distortion there but I see ! and I don't know where is the problem ! I also tried these formula in the circuit : gidiode internode ref value={i0*(exp(v(internode)/({vt}*(v(tcell)+273)))-1)} but the strange thing is that the by increasing the temperature, the open circuit voltage will increase which shouldn't be !!! Thanks for your answer regards Hamed --- In LTspice@..., "analogspiceman" <analogspiceman@...> wrote:
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--- In LTspice@..., "Hhamed" <l0st_l0rd@...> wrote:
The fact is that here I cannot use the standard diode model whileDid you know that a particular instance of a diode may have its temperature set independently of the general circuit simulation temperature such that the diode temperature remains fixed while the temperature of the other devices are varied? D1 1 0 cell n={n} m={m} temp=50 ; diode temp fixed at 50 deg C But, by all means, if you wish, please do carry on with banging your head against your wall of overly complicated netlists and questionably reinvented diode equations. |
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Hello Hamed,
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While I would also advise you to use a standard diode model instead of building your own, I may be able to shed some light on your difficulty. Note that your derived values for ISC and VOC are generated in relation to the reference input 'ref'. However when you use these values in your formulae you are using the value relative to ground: log((v(isc)/{i0})+1) The same is true when you use the input voltage: (v(inp)*iscr)/1000) I have not tried to run your circuit, but I strongly suspect this is why it would work for a single cell where ref = ground and not for a second cell where ref != ground. I think the most sensible fix would be to reference eisc and evoc to ground instead of ref, so you can observe the values externally if you want and not have to subtract the ref voltage. Then change "v(inp)" for example to "v(inp,ref)" where needed. I suggest that if you had drawn this as a circuit instead of writing a netlist these issues would have been quickly apparent, but maybe not. Cheers, Fred --- In LTspice@..., "hamed" <l0st_l0rd@...> wrote:
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Sorry I mis-typed, you probably want to leave v(inp) alone (don't reference it to 'ref') but you do want to change v(internode) to v(internode,ref). There still seems to be some other problem, though, at temperatures other than 25. I don't have time to look any further right now.
--- In LTspice@..., "hamed" <l0st_l0rd@...> wrote: [snip]If you look at the standard diode formula I = Is * exp(qV/kT) it seems like the voltage -should- go up with increasing T, but that neglects the temperature dependence of Is, which is quite strong. If you don't model that then Voc will go up with temperature. Another reason to use the standard diode model. -Fred --- In LTspice@..., "qrx3" <fredh@...> wrote:
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Dear Fred
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Thank you very much for your answer. the reason that I use arbitrary model not a standard diode is that I cannot control temperature change for each solar cell in diode model. Furthermore, the reason that grounds are different is that two cells are in series. Actually I should say that I am not so good in schematics environment and I am used to netlists while I can control the nodes easier. In this model by varying the temperature of each cell most of elements values will change and it is the reason that I cannot use the standard diode model. Kind regards Hamed --- In LTspice@..., "qrx3" <fredh@...> wrote:
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hamed <l0st_l0rd@...> wrote:
the reason that I use arbitrary model not a standard diode is that I cannot control temperature change for each solar cell in diode model.You can. See the Help utility: LTspice IV > LTspice > Circuit Elements > D. Diode Syntax: Dnnn anode cathode <model> [area] [off] [m=<val>] [n=<val>] [temp=<value>] See that last expression? That is the temperature you want that particular diode instance to have. It overrides the global temperature setting. Each diode can have its own temperature. (Didn't someone else in this thread already say that?) Regards, Andy |
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--- In LTspice@..., "hamed" <l0st_l0rd@...> wrote:
Agree, but it is teditious to debug and/or examine a *.CIR file. No one is interested in a .cir file. - as Rick sawreyrw said. No one will do that job for you. So if you cannot transform the *.CIR file to an *.ASC schematic you will not get much help! hws |
What made your netlist confusing to me, where a schematic would have helped, is figuring out the interconnections between the subcircuits, and between them and the other elements. Having nodes marked as "OUTPUT" that are actually inputs to the subcircuit, does not help. Your original note talked about both series and parallel connections, so I expected to see both. Not seeing that, I had to do a bunch of tracing, mentally re-constructing the missing schematic, to figure out whether this was the series case or the parallel case. So a schematic definitely would have helped. It would have made it less confusing, not more. actually the output should not have the distortion in -1.8kA ! and it should continue constant like a diode :)But you never described how this "distortion" manifests itself. Specifically, what did LTspice calculate that differed from your hand calculations of your formulas at the same operating point? (Indeed, did you do any hand calculations at the point or points in question, that show what the signal or signals ought to be?) Saying that signals look funny is one thing. Saying that they are incorrect requires some proof. You have not offered any proof that LTspice's findings are incorrect. In doing that, I think that you would probably find where the error is. Regards. Andy |
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Hello Hamed,
I had a chance to look at this a bit more closely, and I do think LTspice is having a problem with this circuit that it should not have. I have created a simpler version of your circuit, in schematic form, and placed it in the Temp directory. The file is "BadExp.asc." If you run it as-is the simulator fails to find a reasonable solution, voltages and currents that should be in the single-digits are in the 100ks or Megs, not where they should be. However if you change the simulation command to start the DC sweep at 0V instead of -1V it works fine. This is what I saw with your circuit too, I think having two cells in series might have caused the simulator, at some point in its search, to have a negative voltage on one of the cells, and everything blew up. It seems that LTspice tries to use the results of each iteration to start the next iteration, so once it's gone off the rails it stays there. But it really shouldn't be having any problem calculating the solution with negative input voltages. Another way to 'fix' the problem is to force the B-source for Voc to a constant value of 0.564V. This is odd since even when the sim fails that B-source has that correct value on it, while the Bidiode source blows up. I have sent this circuit and observation to Mike @ LT, I'll report back here when I hear from him. --- In LTspice@..., "hamed" <l0st_l0rd@...> wrote: the reason that I use arbitrary model not a standard diode is that I cannot control temperature change for each solar cell in diode model.But as you've been told this is not true. You -can- control the temperature independently for each instance. What's more, the standard model will have the correct temperature dependence while you already know that your equations do not calculate Voc correctly over temperature. --- In LTspice@..., "hamed" <l0st_l0rd@...> wrote: Furthermore, the reason that grounds are different is that two cells are in series.Yes, I understand why you want your model to float so you can connect them without reference to ground, but as I said you did not implement this correctly. Your formulas for Voc and Isc are referenced to the 'ref' node but then when you use those values in the subsequent calculations you are using their value relative to ground. This is wrong. Actually I should say that I am not so good in schematics environment and I am used to netlists while I can control the nodes easier.You should give it a try, with very little practice I think you will find that it's actually much easier to keep track of what nodes are connected where by looking at the schematic than it is by reading a large netlist. I suggest again that you might not have made the errors with the signal references if you had used a schematic instead of a netlist. Best, Fred --- In LTspice@..., "qrx3" <fredh@> wrote: |
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--- In LTspice@..., "qrx3" <fredh@...> wrote:
I had a chance to look at this a bit more closely, and I doThere is no problem with LTspice. It is faithfully calculating the original poster's extremely ill formed diode equations to the limits of the calculation platform's numerical dynamic range. The trouble arises from taking the ratio of two exponential expressions that both may grow to very large values. This can lead to numerical clipping, which LTspice handles well without crashing, but the clipped value causes the ill formed equation to have two solutions, the particular one found depending on the direction of approach. Latching onto the clipped solution can be avoided either by turning the input source, V1, upside down so that the approach is from the favorable direction, or by limiting the expression for BIdiode to only positive values by wrapping its expression within a uramp() function (or some other suitable limiter). It is always best to use the built in devices whenever possible because their internal expressions will always have be manipulated to be as well formed as possible. |
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Hi Hamed,
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I still recommend using the standard diode elements instead of writing your own, the only reason you would not be able to do that is if you need to change the Temperature -during- a transient simulation, e.g. I think everything else (irradiance/Isc) can be adjusted dynamically, and you can have multiple cells in any topology, all with different temperatures and Isc. Temperature can be swept for one/multiple/all devices in an Operating Point solution if that's what you need. If you still think this does not meet your needs please state what you have to do that you can't do with the standard model and I can show you how to fix your equations so that it works. Whether it's reasonable or not LTspice can not handle your equations as you have written them, but it can be fixed. -Fred --- In LTspice@..., "qrx3" <fredh@...> wrote:
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--- In LTspice@..., "analogspiceman" <analogspiceman@...> wrote:
There is no problem with LTspice. It is faithfully calculatingHuh? It's just the standard diode equation, as taught in every elementary device course. It may not be the best way to do what the OP is trying to do, but it seems quite reasonable to me to expect that it should give a reasonable answer. After all, spice solves this exact equation in maybe a majority of the active circuit it simulates, maybe for a dozen elements at a time, why should one expect that it can't handle it in a dependent source? To call this "extremely ill-formed" seems quite hyperbolic. These sorts of content-free, bullying responses make me think the bully is trying to avoid intelligent discussion by intimidation. Sorry I don't react well to that, and I really expect better from this forum. [/rant] The trouble arises from taking the ratio of two exponentialNot really, the exp() in the denominator is constant, and a reasonable value (e**21.7 is well in range of even single-precision floats), it just modifies the constant Visc multiplier to provide the correct open-circuit voltage. The case where things fail is when the input is negative so nothing should blow-up. The "very large" values occur with positive voltages where everything works fine. However you are certainly correct that LTspice seems to be launching itself off the end of its numerical range, ending up with a solution that is completely unrealistic yet the simulator does not recognize that this has happened. Look at the circuit when Vout is negative. The Bidiode source becomes a very low-value current source, with very low incremental conductance. It is in parallel with two high-conductance linear resistors. The Rs dominate what is happening in this regime, why on earth would spice feel the need to drive the voltage at that node so far negative that it wraps around? The circuit is very well-behaved in this range but somehow spice goes off the deep end. I'd have more sympathy if the sim failed at higher voltages when the B source had a significant dI/dV, not where the element is basically out of the circuit. Or if there were no resistors in the circuit so the dV/dI might blow up, but that's not the case either. As more proof that something odd is going on, why does this problem go away when the Voc voltage is changed from an expression of constant inputs to a pure constant? There is no reason the solver should be perturbing the constant inputs to that equation, but apparently it is. This also works fine in a transient analysis if one starts the independent sources at 0, but not otherwise. This raises the question: does LTspice try to solve things like this with some higher-level approach than an incremental analysis? Symbolic analysis? I'm at a loss. lead to numerical clipping, which LTspice handles well without crashingNice that it doesn't crash, but it is wrong to claim a valid solution when this happens, and worse that it uses this bizarre state as the starting point for the next iteration. At the very least make a mention of this in the error log. I'd prefer it recognize that the clipping (wrap-around, I think) has occurred and at least flag that it can not find a solution, as it does in many other situations, or try a different approach like it does for a difficult operating-point. As an experiment I converted the exponential current source into a logarithmic voltage source. Spice had even more trouble solving that at low voltages (not terribly surprised) but at least it recognized that it could not find a solution and moved on to the next point. Once it found a real solution it was fine from there on. but the clipped value causes the ill formed equation to have two solutionsI'd understand that if the equations had two solutions, stable or not, but they do not. What it reports is not a solution at all, KCL is not remotely satisfied at the reported "solution," there are a zillion Amps flowing out of that node from both the diode and the voltage source, and only 9 Amps flowing in. But somehow 73MAmps is within tolerance of 1.#INDA Amps, whatever that is. Latching onto the clipped solution can be avoided either by turningThe first option doesn't help the OP, but the second is a simple fix that seems to work well. I put the uramp() inside the exp() rather than outside and everyone's happy. Why this works when all it really does is add a discontinuity to the dI/dV is well beyond me. It is always best to use the built in devices whenever possibleI agree completely, and you'll see I still recommend that in my responses, but this bothers me anyway because I like to think of LTspice as a general-purpose nonlinear equation solver and here is a simple case of well-behaved equations yet it both fails misesrably and fails to recognize that it failed miserably (I have to think of the original Star Trek episode with "Nomad," once it realized it had made a mistake and, worse, failed to correct its mistake it had to self-destruct. I'm not advocating that behavior for LTspice). Cheers, sorry for the rambling, have a great weekend all, Fred |
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Dear Andy and Dear Fred
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Firstly, I really cannot explain my feelings when I see that you do your best for to solve my problem, I thank you very much. Couple of days ago, I was in vacation and I was thinking that the problem can be from Voc and Isc calculators and actually when I separate the Evoc and Eisc from the main circuit and just grounded them, the distortion disappeared but again it is not working for 2 cells in series while by making two cells in series the open circuit voltage should be doubled which is not happening (it was happening before I separate the calculators but with distortion) ! For making the things more clear, I draw the circuit in Paint ( so ashamed that cannot work with schematics and SPICE good). and corrected circuit But solving this issue is a real challenge for me ! maybe there is only a mistake on nodes ! while it works in parallel not in series ! Again I should say that I really appreciate your helps so far thank you thank you and thank you again. Kind regards Hamed --- In LTspice@..., "qrx3" <fredh@...> wrote:
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