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Do you know if these half bridges are available somewhere? Thanks

--- In LTspice@..., "pascalrenard85" <pascalrenard85@...> wrote:

Do you know if these half bridges are available somewhere? Thanks

Yes, Digikey have them both in stock.
# IRF7317PBFCT-ND
# SI4500BDY-T1-E3CT-ND

(It always helps if you phrase a question unambiguously.)

Regards,
Tony

Thanks Tony,

Sorry if my question was not clear. Let me rephrase it.

What I am looking for is lib/model of one of these half bridges running on LTSpice.

Thanks for your feedback,

Regards,
Pascal.

--- In LTspice@..., "pascalrenard85" <pascalrenard85@...> wrote:

Thanks Tony,

Sorry if my question was not clear. Let me rephrase it.

What I am looking for is lib/model of one of these half bridges running on LTSpice.

Thanks for your feedback,

Regards,
Pascal.



--- In LTspice@..., "Tony Casey" <tony@> wrote:

--- In LTspice@..., "pascalrenard85" <pascalrenard85@> wrote:

Do you know if these half bridges are available somewhere? Thanks

Yes, Digikey have them both in stock.
# IRF7317PBFCT-ND
# SI4500BDY-T1-E3CT-ND

(It always helps if you phrase a question unambiguously.)

Regards,
Tony

Hello Pascal,

I don't particularly want to single you out for criticism, even though I obviously seem to be.

For each of these devices, the manufacturers provide SPICE models for both N and P channel devices straight from the website. It took me 3 minutes to find them; probably less time in fact than it would have taken you to write two messages asking if anyone had them. What does this tell us?

Now, if your question had been along the lines: "...I tried the manufacturers' models, but they don't seem to predict the datasheet behaviour" (which might still be true), or "...LTspice hangs when doing a .tran analysis and then says 'time step too small'", people would be more than keen to find out why and help.

Now because I don't want to be wholly negative, I've made an example for one of the devices (Si4500B), which you can find in Files>Temp. Your assignment is to do the same for the other. How's that for fairness?

Regards,
Tony

Hi Tony.
I have for you is good advice. It applies to models of transistors. I recommend to remove the parameter DELTA. This setting adjusts the threshold of the transistor when the transistor width. It makes a significant contribution to the width of transistors of the order of several microns or less. With the width of the transistor more than 100 microns in the threshold correction is very small. You can verify this by your example. Note the time of calculation. DELTA exception parameter reduces the computation time and improves the convergence.
Bordodynov.

--- In LTspice@..., ?????????× á???????? <bordodunovalex@...> wrote:

Hi Tony.
I have for you is good advice. It applies to models of transistors. I recommend to remove the parameter DELTA. This setting adjusts the threshold of the transistor when the transistor width. It makes a significant contribution to the width of transistors of the order of several microns or less. With the width of the transistor more than 100 microns in the threshold correction is very small. You can verify this by your example. Note the time of calculation. DELTA exception parameter reduces the computation time and improves the convergence.
Bordodynov.

Hello Alex,

Thanks for your advice, I hope it helps someone. I tried setting Delta to 0 and 1, in the Si4500B example, and confirmed by looking at the data that there was almost no difference. The difference was never greater than 0.45% for the drain current.

Perhaps, as you say, it affects smaller devices significantly more.

I'm not a CMOS designer, so I learned something today, and it's not even lunchtime yet!

Regards,
Tony