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Date

Re: Conductance Negative

 

A new file has been uploaded: ? ? ? ? ? ? ? ? ? ? ?Negative_Resistance_Ckt.asc.zip ? ? ? ? ??? This is a generic (architectural) schematic with no component values but it IS an LTspice file. Pick a zener (typically around 5V), an NPN transistor (I use 2N3904), a PNP transistor (I use 2N3906), ?I use a few KOhm for R1, R2, R3, R4. ?I use a few hundred ohms for R5. R4 should not be so large that Q1 saturates at peak current. Avoid reverse base-emitter breakdown of Q1 at maximum input voltage.
?
Jim Wagner
Oregon Research Electronics


Re: Conductance Negative

 

So, sorry - that drawing has been bad for lots of years! ?Q2 should be PNP! ?I will correct it. Don't want bad stuff out there. Should I remove the incorrect post?
?
Jim

On 03/31/2025 5:56 AM PDT Andy I via groups.io <ai.egrps+io@...> wrote:
?
?
On Sat, Mar 29, 2025 at 09:38 PM, Jim Wagner wrote:
I think I have the circuit you need. It is circa-1965 and uses 3-4 bipolar transistors, a zener diode, and a handful of resistors. ...
Jim,
?
Your schematic in the photo you uploaded shows two NPN transistors, but the description that accompanies it mentions "2N3904/6" which implies that one of them is a PNP.? I have not tried (nor studied the circuit in detail), but I wondered if Q2 is supposed to operate in reverse breakdown mode so it is an NPN, or if it was supposed to be a PNP.
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Did you draw that schematic, or was it originally drawn with two NPNs, and is one of them wrong?
?
Andy
?


Re: Simulation runs very slowly: test.asc

 

A correctly made model would not care whether the voltages are +/-15, or +30, or (+20 & -10) volts.? It's all just relative.? From the op-amp's perspective, the only difference is where the external ground voltage happens to be.
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Of course there are badly constructed SPICE models too, that do the wrong thing.? Hopefully those are few now.
?
Andy
?


Re: Simulation runs very slowly: test.asc

 

¿ªÔÆÌåÓý

I was considering the 15 V unbalance, not the absolute values. But it was just a guess. A generic model would probably not show that, or not work at all.

On 2025-03-31 13:31, Andy I via groups.io wrote:
On Mon, Mar 31, 2025 at 05:13 AM, John Woodgate wrote:

It might not be so good with +20V and -5V rails. I doubt that is tested.

I noticed that the generic SPICE macromodel for the ADA4084 states that it was tested only with 30V (+/-15V) supplies.
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The built-in LTspice model does not say.? But I would hope that it works ALMOST the same with 25 V as it does with 30 V rails.? The part's datasheet has extensive data for 3, 10, and 30 V rails.
?
Andy
?
--
OOO - Own Opinions only If something is true: * as far as we know - it's science *for certain - it's mathematics *unquestionably - it's religion


Re: Conductance Negative

 

On Sat, Mar 29, 2025 at 09:38 PM, Jim Wagner wrote:
I think I have the circuit you need. It is circa-1965 and uses 3-4 bipolar transistors, a zener diode, and a handful of resistors. ...
Jim,
?
Your schematic in the photo you uploaded shows two NPN transistors, but the description that accompanies it mentions "2N3904/6" which implies that one of them is a PNP.? I have not tried (nor studied the circuit in detail), but I wondered if Q2 is supposed to operate in reverse breakdown mode so it is an NPN, or if it was supposed to be a PNP.
?
Did you draw that schematic, or was it originally drawn with two NPNs, and is one of them wrong?
?
Andy
?


Re: creating PNP caracteristicsby sweeping plot in LTspice from a circuit I built

 

Sorry, I also should have said this:? Ground the Emitter and connect the negative collector voltage source to the transistor's collector.
?
Obviously, the graph you uploaded needs to be inverted (or plotted with negative voltages going right and negative currents going up) when using a PNP.
?
Andy
?


Re: creating PNP caracteristicsby sweeping plot in LTspice from a circuit I built

 

On Mon, Mar 31, 2025 at 07:27 AM, john23 wrote:
Is a there a way by clever type of sweep to recreate the basic characteristics plot of the attached PNP plot?
Sweep the collector voltage.
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Sweep the base current over a number of steps.
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Do not do this as a .TRAN simulation.
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In your circuit, remove R1, R2, and R3.? Replace V1 with a current source.
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Use one .DC command that specifies two sources.? If I remember correctly, the "1st Source" should be the collector voltage, and the "2nd Source" should be the base current.? Sweep the collector voltage with fine increments (0.1 V or smaller), and sweep the base current over a smaller number of steps (0.2 uA increments).
?
Andy
?


Re: Simulation runs very slowly: test.asc

 

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Andy,

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Thanks again for all your help and suggestions. And yes, test.asc is just that ¨C a schematic for testing the circuit in another schematic. The schematic I didn¡¯t post was the one I was commenting on.

?

Sorry, busy day.

From: [email protected] <[email protected]> On Behalf Of Andy I via groups.io
Sent: Monday, March 31, 2025 12:43 AM
To: [email protected]
Subject: Re: [LTspice] Simulation runs very slowly: test.asc

?

Chris,

?

Analog Devices has another SPICE model for the ADA4084, downloadable from the part's webpage.? The model that comes with LTspice has elements that require LTspice.? The downloadable model is generic SPICE.? They were likely created by different people at ADI.

?

I tried it in your circuit.

?

It seems to "work" with either Solver, with or without a 10K pulldown resistor at the output.? However, it is rather slow using the Normal Solver.? It's not nearly as slow as your circuit was.? It makes slow but steady progress.? Also there are glitches, so something (an oscillation?) seems to be going on.

?

With the Alternate Solver, it takes a few seconds to find the initial operating point, but then it simulates the rest in the blink of an eye, and I see no glitches in the waveform.

?

These are interesting results, but puzzling.

?

Andy

?

?


Re: Simulation runs very slowly: test.asc

 

On Mon, Mar 31, 2025 at 05:13 AM, John Woodgate wrote:

It might not be so good with +20V and -5V rails. I doubt that is tested.

I noticed that the generic SPICE macromodel for the ADA4084 states that it was tested only with 30V (+/-15V) supplies.
?
The built-in LTspice model does not say.? But I would hope that it works ALMOST the same with 25 V as it does with 30 V rails.? The part's datasheet has extensive data for 3, 10, and 30 V rails.
?
Andy
?


Re: Conductance Negative

 

On Mon, Mar 31, 2025 at 03:26 AM, jacfev wrote:
I tried to simulate a negative resistance using btdeboi's netlist, but I can't complete the schematic.
Can you help me complete it ?
See Negative Conductance.asc
Compared to the netlist in btdeboi's?message, there is one omission in your schematic.? Change the formula of the B-source B1, from this:
I = V(Vi,Vo)/R
to this:
I = V(Vi,Vo)/V(Vr)
That's all I can tell you because it is missing a SPICE simulation command (.OP or .DC or .AC or .TRAN?) and I don't know where/why it works.? I guess you need to work that out.
?
If you sweep the voltage source V1 (.DC V1 ...), the current through B1 and Rmeas linearly decreases as V(Vi) increases.
?
Andy
?
?


creating PNP caracteristicsby sweeping plot in LTspice from a circuit I built

 

Hello , in the attacehd zipped file I have created a basic PNP biasing circuit . The simultion is in time domain , I added plots of different ports.
Is a there a way by clever type of sweep to recreate the basic characteristics plot of the attached PNP plot?
Current vs Vce plot.
Thanks.
/g/LTspice/files/Temp/03_01_25.zip


Re: Simulation runs very slowly: test.asc

 

¿ªÔÆÌåÓý

It might not be so good with +20V and -5V rails. I doubt that is tested.

On 2025-03-31 01:57, Christopher Paul via groups.io wrote:
Would you suggest contacting Analog Devices about this? The datasheet says unity gain operation is acceptable.
--
OOO - Own Opinions only If something is true: * as far as we know - it's science *for certain - it's mathematics *unquestionably - it's religion

Virus-free.


Re: Simulation runs very slowly: test.asc

 

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Yes, I know that was Mike's argument, and of course he is notoriously unbiddable. So I suggest it could be an option in the symbol creating page, 'Do not add full path to the model file'. Or the opposite.

On 2025-03-30 23:56, Andy I via groups.io wrote:
On Sun, Mar 30, 2025 at 06:46 PM, John Woodgate wrote:

Yes, it can be fixed, but wouldn't it be better if it didn't happen? Should we ask for it to be changed to only show the model filename?

It is actually this way quite intentionally.? I had a discussion with Mike Engelhardt about it several years ago.
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Auto-generating symbols makes it as easy as possible for anyone to make a symbol without trying.? As such, it needs to encode where the model file lives, on the assumption that it might not already be located in a place where LTspice looks to find model files.? Thus, it saves the whole filespec to the model file, in the symbol.
?
Shortening that to just the filename SHOULD (in my opinion) be done, manually, by any LTspice user who wants to have a hand in the simulation process.? But it would break it for other LTspice users who don't care or don't want to understand anything about "what's under the hood".? It would be bad (in my opinion) to change LTspice in a way that makes the Automatic Symbol Generation step fail for many users, especially the newbies.
?
Andy
?
--
OOO - Own Opinions only If something is true: * as far as we know - it's science *for certain - it's mathematics *unquestionably - it's religion


Re: PTC model with internal temperature rise

 

On Sat, Mar 29, 2025 at 03:37 PM, Andy I wrote:
It is currently in the Temp folder at the group's website.
Hello Andy,
it's ok now, I move it to the good folder.


Re: Simulation runs very slowly: test.asc

 

¿ªÔÆÌåÓý

This is what happens if you don't start a new thread: Email threads. Changing the subject doesn't affect how they are listed in a threaded display. It just confuses things.

People use threads in (news)groups in order to see which message is a direct reply to another, and which messages are not. Threads may contain hundreds of messages, all laid out logically.

--
Regards,
Tony

On 30/03/2025 23:45, Christopher Paul via groups.io wrote:

I¡¯m sorry.

?

I count one email with a definitely wrong subject: RE: [LTspice] Model of BF970

?

The others have different subject files which I have emailed, but they are each my own:

test.asc

test.asc and ADA4084-2.zip

test_2.zip.

?

I see now that I should have kept one email title for all of these, which were the results of problems that Andy requested I fix.

?

I use gmail. So:

?

??????????????? In the future, I should continue to post my schematic files in the temp folder. All emails related to my topic should have a unique one and only subject. Correct?

?

In spite of my mistakes, is there something that I can do now to request help?

?

Apologies,



Re: Conductance Negative

 

I tried to simulate a negative resistance using btdeboi's netlist, but I can't complete the schematic.
Can you help me complete it ?
See Negative Conductance.asc


Re: Simulation runs very slowly: test.asc

 

Chris,
?
Analog Devices has another SPICE model for the ADA4084, downloadable from the part's webpage.? The model that comes with LTspice has elements that require LTspice.? The downloadable model is generic SPICE.? They were likely created by different people at ADI.
?
I tried it in your circuit.
?
It seems to "work" with either Solver, with or without a 10K pulldown resistor at the output.? However, it is rather slow using the Normal Solver.? It's not nearly as slow as your circuit was.? It makes slow but steady progress.? Also there are glitches, so something (an oscillation?) seems to be going on.
?
With the Alternate Solver, it takes a few seconds to find the initial operating point, but then it simulates the rest in the blink of an eye, and I see no glitches in the waveform.
?
These are interesting results, but puzzling.
?
Andy
?
?


Re: Simulation runs very slowly: test.asc

 

Chris,
?
Here is another thing that seems to help:? Add a pull-up or pull-down resistor between the output of the op-amp and its V+ or V- supply.? I used a 10K resistor and that seemed to do a nice job with LTspice's Normal Solver.? In fact, using the 10K pulldown to V- also makes LTspice find the initial operating point much faster.? (Source Stepping succeeds, but failed without it.)
?
I was noticing the fact that the ADA4084's output pin seems to be the junction of two collectors, so its open-loop Zout might be rather large, and I wondered what were the consequences of that when driving nothing more than a MOSFET gate.? So I added a resistor there to maybe dampen and lower the impedance, and for whatever reason, it seems to quench whatever goes wrong in the simulation.? No guarantees.
?
I don't know if this translates to the need for something similar in actual hardware.
?
The datasheet mentions that the ADA4084 open-loop voltage gain depends on the load connected to the output.
?
Andy
?


Re: Simulation runs very slowly: test.asc

 

On Sun, Mar 30, 2025 at 08:35 PM, Christopher Paul wrote:

... Only one of the _IN, V_Supply and _OUT supplies is active at a time. When active, they test the circuits¡¯ transfer, supply noise suppression, and output impedances over frequency at DC currents of 10, 100 and 1000mA.

What are the _IN and _OUT supplies?? I'm guessing they are on schematics you have but did not upload?
?
Andy
?


Re: Simulation runs very slowly: test.asc

 

Chris,
?
These kinds of internal "oscillations" are more mathematical, not real.? Has nothing to do with being unity-gain stable.? I just want to suggest the possibility of some sort of numerical instability, perhaps in the sub-femtosecond range.
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It's hard to say if their model alone is at fault.? Might be interaction between devices.
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Andy