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John, Your method relies on the vectorial sum of voltages and sum of currents in the branches being zero, which is the case in a delta or floating-Y connection. But when both the source and load are

Hello, I'm trying to simulate (transient run) a power dependant resistor, the resistor is used to dump an high energy capacitive bank (like an RLC circuit). During the fast discharge, the resistor

In message <FDCC225ADA75E84DABFCD1B05EE2FC2B0140DD@...>, dated Tue, 24 Dec 2013, jim.klessig@... writes: Only if the other two phases are **open-circuit**, in which case,

In message <1932965163.4191125.1387841577938.JavaMail.root@...>, dated Mon, 23 Dec 2013, Jim Wagner <wagnejam99@...> writes: Agreed, but how big is the effect likely to be? -- OOO -

Received my purchased copy today!!!

I am sure LTC has the part. I used it. Even posted a SEPIC converter based on it. Jack Sent from my BlackBerry? by Boost Mobile

Jim, If you implement the 2 wattmeter method correctly it works fine. If one phase has a huge power, it doesn't matter. Rick

Same chip Sent from my BlackBerry? by Boost Mobile

Hello Ken, Some UC384x models can be found here. http://groups.yahoo.com/neo/groups/LTspice/files/adventures_with_analog/my%20model%20files/ Maybe the UC3845 is similar to the UC1845. Best regards,

Charles, The cost is ridiculous unless you work for a large company that really needs it and can afford it.? Someone familiar with LTspice who understands PWM ICs could build a useful model in a

Some one said "In real life, use two wattmeters. Call the phases A, B and C. One meter has its current coil in phase A and its voltage coil between A and C. The other meter has its current coil in

You can purchase the official model (original creators of the model) at http://www.aeng.com/library.htm http://www.aeng.com/library.htm

You need to be careful about equating a JFET and a vacuum tube directly. Yes, they are very similar, but there are some very important physical differences. Because the frequency changes for one

In message <l9afub+10tlbe4@...>, dated Mon, 23 Dec 2013, sawreyrw@... writes: The OP asked how to do it in real life, and that is what I posted. -- OOO - Own Opinions Only. With best

In message <CANnsUMHruA-cbtCW3yswZaaKDayat7KKSm1wdPE3YZpvtmrAww@...>, dated Mon, 23 Dec 2013, Chris Maness <chris@...> writes: One way to tell is to analyse the circuit in

John, The 2 wattmeter method will work, but to avoid building a model of the wattmeters, it would easier to simply use the LTspice power plotting feature. You can easily get a numerical display of the

Jim, The standard LTspice JFET model includes 2 nonlinear caps. Rick

So would the change in gain due the change in B+ be the most likely cause of f_o change for a Clapp oscillator with a valve state amplifier? The reason for the inquiry is at this point mostly

In message <CANnsUMFiEqEOs9Si0pke8F-9R34KDT+DGL8kOgkA3oN15_WQ-g@...>, dated Mon, 23 Dec 2013, Chris Maness <chris@...> writes: Miller effect is feedback via the anode-to-control

In this case, "Miller Effect" capacitance is just the gate-drain capacitance multiplied by the stage gain. Miller capacitance won't change unless one or the other (gain, or Cdg) changes. Cdg WILL