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"Physical" PTC model
Hello to the community, I'm very interested by the "PTC Thermistors Physical model" found in /g/LTspice/files/z_yahoo/Lib/PTC%20Thermistors/Physical%20model and I have two questions
By pilou@... · #159155 ·
Re: proper way to simulate fluctuating load for voltage regulator
Use a resistor to set the nominal load and put a current source in parallel. Then use the current source as the input for an AC analysis. Load regulation (and line) varies with frequency and that is
By David Schultz · #159154 ·
Re: proper way to simulate fluctuating load for voltage regulator
A common way of testing regulators is to use a current source as the load, but a resistor is just as easy. You need to decide what the range of the load current is going to be. Your circuit presently
By Tony Casey · #159153 ·
Re: proper way to simulate fluctuating load for voltage regulator
BTW -- it might not matter -- but it is slightly odd that you used the higher-power BJTs in the low-power part of the circuit, and a lower-power BJT in the high-power part of the circuit.? With JEDEC
By Andy I · #159152 ·
Re: proper way to simulate fluctuating load for voltage regulator
I wrote: I meant to write *Bi* -source.? In other words, a B-source with I=<value>.? You can get fancy where the I depends on its voltage, thus turning it into a controllable resistance.? That's
By Andy I · #159151 ·
Re: proper way to simulate fluctuating load for voltage regulator
Your uploaded files have very little information. Is the "regulator" the 3-transistor circuit, with R4 being the load at the regulator's output? Can you? describe how you want the load to vary?? Do
proper way to simulate fluctuating load for voltage regulator
Hello ,I am trying to test a voltage regulator by re[lacing a steady resistor with some sort of varying resistor. Given the circuit in the attached Zip file , what kind of "resistor" you reccomend?
By john23 · #159149 ·
Re: DanTherm model (SOAtherm)
Hello to all, I just discovered the discussion. I would be very interested by the SOATherm simulation. I found it crazy that this is almost unusable as there is almost no documentation on it. Does
By pilou@... · #159148 ·
Re: cannot plot power dissipation from elements in ltspice 24.1.4
You're not, by any chance using Linux+Wine, are you? If so, try ctrl-alt-leftclick. Apparently, alt-leftclick is assigned to something else on most Linuxes, even though the alt key alone produces the
By Tony Casey · #159147 ·
Re: How to create IEC 61000-4-5 surge waveform in time & s behavioral ?
Hello, Marcel: At first, it's the ideal in sketch the applied circuitry in s-domain on how to attenuate the surge amplitude. Sometimes, in math domain, possibly solutions will be clear to see, though
By ericsson.sunshine@... · #159146 ·
cannot plot power dissipation from elements in ltspice 24.1.4
after simulation, i do the following: e.g. on a resistor R1, holding alt button and hovering over the element R1 shows in the status bar "Left-click to plot R1 dissipation: ...". but doing so, does
By thereitis · #159145 ·
Re: How to create IEC 61000-4-5 surge waveform in time & s behavioral ?
I'm curious as to why you want to (inaccurately) do this in the s-domain? Your equation is available in the time domain, and it perfectly fits the way of working of the EXP() voltage source: Vxxx n+
By mhx@... · #159144 ·
Re: How to create IEC 61000-4-5 surge waveform in time & s behavioral ?
.asc files are sometimes used in public key cryptography. This might be the reason they are restricted - might be on the IT department's blacklist. Just like there are many types of files you can't
By Tony Casey · #159143 ·
Re: How to create IEC 61000-4-5 surge waveform in time & s behavioral ?
Hi, Tony, Andy: Thank you for your opinions and sharing files. The file uploading issue was not about technical, it's about company policy, they will log the uploaded files, and trace the content
By ericsson.sunshine@... · #159142 ·
Re: How to create IEC 61000-4-5 surge waveform in time & s behavioral ?
Oops. Zip file updated with symbol. -- Regards, Tony
By Tony Casey · #159140 ·
Re: How to create IEC 61000-4-5 surge waveform in time & s behavioral ?
I uploaded your file for you, in "IEC_61000-4-2_Surge_6KV_ericsson_sunshine.asc" in the Temp folder. It is curious that you can upload a Photo but not a File.? Does groups.io actually allow one but
By Andy I · #159139 ·
Re: Use a TABLE function in a BV to make a custom defined function.
Be aware that this BV table syntax is broken in LTspice 24.1.x at the moment. We have been assured that it will be fixed in 24.1.6, but we don't know when that will happen. -- Regards, Tony
By Tony Casey · #159138 ·
Re: How to create IEC 61000-4-5 surge waveform in time & s behavioral ?
On 14/03/2025 07:32, ericsson.sunshine via groups.io wrote: > Hi, : > May I ask a question about to generate the surge waveform using time equation & s-equation, on how to do that in LTspice ? > For
By Tony Casey · #159137 ·
How to create IEC 61000-4-5 surge waveform in time & s behavioral ?
Hi, : May I ask a question about to generate the surge waveform using time equation & s-equation, on how to do that in LTspice ? For example, I asked the ChatGPT, about the 6.0KV surge waveform of
By ericsson.sunshine@... · #159135 ·
Re: Chan model for saturable transformer LTSPICE simulation #Transformer
Hi. https://www.dextermag.com/wp-content/uploads/2017/03/Dexter_Hitachi_FINEMET-CommonModeChokeCore_2013Sep6.pdf The ferrite you specified is low-frequency. There is a Fe - Feddy parameter in my
By §¡§Ý§Ö§Ü§ã§Ñ§ß§Õ§â §¢§à§â§Õ§à§Õ§í§ß§à§Ó · #159134 ·