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Hello, A standard V-source in SPICE cannot be a behavioral source. You have to use a Bv-source. Add a "bv" and change V=F(...) to the formula below. V=if(V(Vsense)>1.2,1,0) Best regards, Helmut

Hi, friends. I have a question, have a problem with the simulation about the sentence (if). I want to simulate a power supply with the statement (if) using the generator (bv.asy), and with the

Hi, Andy: I'm sorry, this might be too short (not clear), I forgot to say the FPGA similarity, it simply read a setting file, which configures the cell setting (set or unset), so every different

Hi, Andy: Thank you, I have ran successfully the stepping .model simulations. May I ask , do you have any idea of example of describing stepping subckt (what you have mentioned) , because I can't get

Update: The Nov. 29 2018 release fixes this problem. Thanks!

re: "Does this sound reasonable ?" I'm sorry, but I don't understand what you wrote (in the paragraph before the question). Andy

ericsson.sunshine wrote: "About the efficieny, I didn't mean affecting the application of the simulation for, I simply meant the 'spent time' of accomplishing the simulation(s)." That is what I meant

ericsson.sunshine, don't be misled by what you saw in the Help, which (BY COINCIDENCE) has both ".STEP" and "NPN" in the same command line. That one is a very special case of the .STEP command. For

You know, if the computer resource is enough, I think maybe I could build the default of every possible architecture of the circuit topology in a single schematic, though at every single .STEP, mainly

Hi, Andy: Thank you for the answering. About the .STEP & .MODEL 1 NPN(...) , may I ask if there is any example already ? I could understand the '.MODEL1 NPN(...)' syntax in standard.bjt, but I don't

Hello, There is a new version of MAC-LTspice. The FFT is working again. Please update. Control Panel -> Operation -> Software Update Best regards, Helmut

Hello eT, Thanks a lot for correcting this model. Could you please make a new folder "CD4047 new" in the hyperlinked Files-section below and upload your zip-file in this new folder.If you have any

very thanks Andy

Hi I've uploaded a CD4047B circuit (originally downloaded from this groups files section) with some adjustments to the symbol attributes. Some attributes were incorrect and would produce errors. eT

Hello John, Yes I have used the default SPICE-settings in the Control Panel. What we get is a discharge with the R*C time constant of 100ns. The average is 20uV. The low value is about 12uV, but this

It's your _pulse charge accumulation.asc completely unchanged, and LTspiceXVII is at all default settings Best wishes John Woodgate OOO-Own Opinions Only J M Woodgate and Associates www.woodjohn.uk

Hello John, Please upload your schematic wich shows bad results in your opinion. Best regards, Helmut

I don't want to spread the problem all over the list. I sent Helmut a screenshot by private email, and you can have it too, if you want. Best wishes John Woodgate OOO-Own Opinions Only J M Woodgate

I have not said that Helmut is wrong, but if you don't set N and simulate for longer, even with .plotwinsize=0, you (or at least I ) get very strange results. Best wishes John Woodgate OOO-Own

I meant to say, Helmut is correct about the original problem that Eamon had. It's not clear to me what's happening with John's case with 400 pulses. Narrowing the Maximum Timestep does help, somewhat.