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Gunoi Nare wrote: "this is just what I am trying now.It is not perfect but it works." I am wondering why you say it is not perfect. If you have the frequencies and their phases right, it ought to be

Hi. See file Modulator.asc in TEMP folder. Bordodynov. 17.08.2016, 12:24, "Gunoi Nare gunoiar@... [LTspice]" <ltspice@...>:

Great minds think alike :) "There is a third option, which would be to generate the two sideband signals directly, using two SINE sources and adding them together." this is just what I am trying

"I assume everyone was testing with 64 bit LTspice XVII or they would have noted otherwise." I think there are a lot of people with 64-bit CPUs, running 32-bit Windows, who do not realize it. The

Yesterday I wrote that -1E308 dB was numeric underflow, but that's wrong. Actually it is overflow, with a negative number. Sorry. Andy

I miss a lengthy statement about performance issues from Mike. Surely he did longer tests to optimize the decision algorithm. So he knows enought to guide us but he won't or I missed it. What I know

Hi Andy, This was an informal exercise just to help me chose a new home computer optimized for LTspice. :-) Except for my old Pentium D, which was XP 32 bit LTspice IV, I assume everyone was testing

analogspiceman wrote: "Cores Clock Processor, Memory, Disk: Time (2/2) 3.00GHz Pentium D-930, 2GB, HD: 451s (my old home tower) ..." ?But you are not tracking which versions (LTspiceIV or

Mike claims that LTspice tests the hardware performance of each machine on which it runs and then decides for each simulation how many of the available cores and threads is worth the additional

Indeed, there are Xeons that have 20+ cores that you would be paying $10k+ for. However, I don't think you would be gaining much speed by splitting a simulation into even more threads, and in fact you

Allan, What you wrote only applies to small simulations that generally run very fast anyway. The typical large simulation that I run at work will max out all four cores and eight threads available to

Your simulation speed will be directly proportional to the clock speed. The CPU speed is the bottleneck after all, If your CPU turbo boosts to 3.8 GHz (one core), and you overclock to 4.4 GHz, then

Hi. The fact that I am interested in the behavior of inductors and at the approach to saturation. Usually, lead ferrite losses at the induction B = 0.2Tesla. This is already affecting the core

"- 1E308 dB" That is essentially numeric underflow. There is no number to show negative infinity decibels, and the logarithm (decibel calculation) of zero, is negative infinity. A little more about

Gunoi Nare wrote: "To my surprise I can not find a LTC multiplier." I would not use a real analog multiplier IC, if all I wanted was to simulate a double-sideband suppressed-carrier signal. (FYI, I am

In detailed analysis, the permeability of the core is a non-linear function of amplitude even at low amplitudes. 'Saturation' is at the H value at which the non-linearity becomes gross. With best

That number is Windows interpretation of the reciprocal of infinity. With best wishes DESIGN IT IN! OOO – Own Opinions Only <http://www.jmwa.demon.co.uk/> www.jmwa.demon.co.uk J M Woodgate and

Hello Helmut, Thank you very much, that worked fine. For some reason I was getting a runtime error when I'd done that before. It must have been caused by some other error that is now fixed. It is

Hello With Helmut's options Normal solver, .options gmin=1e-10 abstol=1e-10 reltol=0.003 No sdd .options gmin=1e-10 abstol=1e-10 reltol=0.003 .end WARNING: Node U3::44 is floating. WARNING: Less than

Hi, I thought he Inductance of an inductor is independent of the amplitude of the driving signal assuming you don't saturate the core. Please correct me If I am wrong. Michael To: